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Biasing of Jfet

The document summarizes a lecture on biasing JFETs that was delivered on 10/12/2021 as part of an Electronics Devices and Circuits course. It introduces three biasing techniques: voltage divider bias, fixed bias, and self bias. Key details about voltage divider bias include using a voltage divider circuit to set the gate-source voltage and finding the equivalent Thevenin circuit. Fixed bias directly applies a voltage to set the gate-source voltage at a desired level to control drain current.

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Naresh Bopparathi
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383 views15 pages

Biasing of Jfet

The document summarizes a lecture on biasing JFETs that was delivered on 10/12/2021 as part of an Electronics Devices and Circuits course. It introduces three biasing techniques: voltage divider bias, fixed bias, and self bias. Key details about voltage divider bias include using a voltage divider circuit to set the gate-source voltage and finding the equivalent Thevenin circuit. Fixed bias directly applies a voltage to set the gate-source voltage at a desired level to control drain current.

Uploaded by

Naresh Bopparathi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Course Title Electronic Devices and Circuits

Course Code AECC01


Class II ECE – III Sem
Name of the Faculty B Naresh
Lecture Date 10/12/2021

Topic covered Biasing of JFET

1
Introduction
 To maintain proper Q point it requires biasing.
 Voltage divider bias
 Fixed bias
 Self bias

2
Course Outcome / Topic learning outcome
Name of the topic Topic Learning Course Outcome
Covered Outcome
Biasing of JFET Illustrate the Design the various biasing
need of techniques for BJT, JFET and
biasing in FETS MOSFETs amplifier circuits
considering stability condition
for establishing a proper
operating point.

3
Outcome achieved
Name of the Topic: Biasing of JFET, MOSFET

Students will be able to do

Design the various biasing techniques for BJT, JFET and MOSFETs
1 amplifier circuits considering stability condition for establishing
a proper operating point.

4
Biasing of JFET

Voltage divider bias:

5
Biasing of JFET

Voltage divider bias:


Here we need to find the thevenins
equivalent circuit

  𝑅2
𝑉 𝐺𝐺 = 𝑉
𝑅 1 + 𝑅2 𝐷𝐷

  𝑅1 𝑅2
𝑅𝐺 =
𝑅1 + 𝑅2

6
Biasing of JFET

Voltage divider bias:

Thevenin’s Equivalent Circuit

7
Biasing of JFET

Voltage divider bias:


 

Since

=-
Thevenin’s Equivalent Circuit

8
Biasing of JFET

Voltage divider bias:


 

Since

=-
Thevenin’s Equivalent Circuit

9
Biasing of JFET

Voltage divider bias:


 
From output loop

Since =

=-
Thevenin’s Equivalent Circuit

10
Biasing of JFET

Voltage divider bias:


 
From output loop

Since =

=-
Thevenin’s Equivalent Circuit

11
Biasing of JFET

Fixed bias:

12
Biasing of JFET

Fixed bias:

The FET device needs DC bias for


setting the gate to source voltage
VGS to give desired drain-current
ID.

13
Biasing of JFET

Fixed bias:

 
The gate to source voltage is
=-0
=

14
Biasing of JFET

Fixed bias:

 
From output loop

15

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