Bridging Fault Model Presentation
Bridging Fault Model Presentation
● Definition:
○ Two(or more) distinct logic signals unintended shorted together and create
wired logic.
11 11 11 11
f a
g b
f a a+ f a a+
g b b+
Wired Logic is Imaginary, not Real g b b+
DIFFERENT MODELS NEED DIFFERENT PATTERNS
● Consider (A, B) bridging fault
○ WIRED - AND, WIRED - OR detected by 001 , 010
○ A - dominant model detected only by 010
INPUTS FAULT-FREE WIRED WIRED A-
ABC OUTPUT -OR -AND DOMINANT
A H 000 0 0 0 0
K 001 1 1 1 1
L
010 1 0 0 1
B
011 1 0 0 1
C E F J
100 0 0 0 0
101 0 0 0 0
110 0 0 0 0
111 0 0 0 0
FEEDBACK BRIDGING FAULTS
● Type 2: creates oscillation
● Type 1: creates memory ○ “Hard” detected by 10, or 11
○ Detected by test sequence 01 -> 00 ○ “Potentially” detected by 00
INPUTS FAULT-FREE FAULTY INPUTS FAULT-FREE FAULTY
XY OUTPUT OUTPUT XY OUTPUT OUTPUT
00 0 unchanged 00 1 oscillation
01 1 1 01 0 0
10 1 1 10 0 0
11 1 1 11 0 0
WIRED-OR WIRED-OR
x A x
y A
y
0101010….
A+
y x=0 A+
y=0 x=0
What are NOT BRIDGING FAULT?
1. Bridging fault does NOT distinguish between fanout stem and branches
2. Bridging fault is NOT transient fault
PERMANENT FAULTS VS TRANSIENT FAULT
100 0 0 0
A H
101 0 0 0
B L 110 0 0 0
111 0 0 0
C E F J
THANK YOU