Mos Diode: by C. V. Anil Kumar Dept. of Electronics Engineering College of Engineering, Chengannur
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ARAVINDMos Diode: by C. V. Anil Kumar Dept. of Electronics Engineering College of Engineering, Chengannur
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ARAVINDMOS DIODE
By
C. V. Anil Kumar
Dept. of Electronics Engineering
College of Engineering, Chengannur
NMOS Transistor: Structure
• 4 device terminals:
Gate(G), Drain(D),
Source(S) and
Body(B).
• Source and drain
regions form pn
junctions with
substrate.
• vSB, vDS and vGS
always positive
during normal
operation.
MOS Capacitor Structure
• First electrode- Gate: Consists
of metal like aluminium or
low-resistivity material such
as polycrystalline silicon
• Second electrode- Substrate
or Body: n- or p-type
semiconductor
• Dielectric- Silicon dioxide:
stable high-quality electrical
insulator between gate and
substrate.
Substrate Conditions for Different
Biases
• Accumulation
0VTN
– VG<<V
• Depletion
– VG<VTN
• Inversion
– VG>VTN
Band structure of an ideal MOS
capacitor (at zero bias)
•Φms = 0
•There are no charges in the oxide
•There is no carrier transport through
the oxide
Ideal MOS capacitor (at Vg < 0)
dV ( x ) d Ei 1 dEi
E ( x)
dx dx q q dx
q ox For semiconductor the
equilibrium carrier concentration
is exponentially related to the
q s difference between Ef and Ei
B B
p p 0 N A ni e VT
nno N D ni e VT
Where ΦB= Ei - Ef
B s s
p ps ni e VT
p p 0e VT
s q( Ei Eis)
Depletion (Vg≥ 0)
B s s
p ps ni e VT
p p 0e VT
s B s
qΨs
n ps ni e VT
n p 0e VT
2
ni
np0
p p0
Inversion
QB = -qNAW
2 s s
W
qN A
QG QB
W
QB 2qN A s s
Qn
Threshold voltage (VT)
VGB s ox
Gauss law
D.ds .dv
vol
Where D E
Total normal electric flux coming out of a closed surface equals the
charge enclosed by the surface
+ + + + + + + + + Metal
Oxide
- - - - - - - - -
Gauss surface Semiconductor
ox Eox Qs
If tox is the oxide thickness, then the oxide drop is
tox Qs (2qN A s s
ox Qs Where Qs QB
Cox
ox Cox
tox
VGB s Qs
ox
2qN A s s
s
Cox
At the onset of strong inversion surface potential is 2ΦB
and W approaches WMAX
2 s (2 B )
WMAX
qN A
Threshold voltage (VT) (continued)
• The value of VGB that must be applied to just
create a condition of strong inversion is known
as the threshold voltage
2qN A s (2B )
Vth(ideal ) 2B
Cox
Non idealities – Φms ≠ 0,Qox=0
MOS Diode with Φms≠0, Qox=0
With Φms ≠ 0, a portion of VGB must be used for achieving
flat band condition. So now
Vth V FB Vth (ideal )
2qN A s (2 B )
Vth VFB 2 B
C ox
Non idealities – Φms ≠ 0,Qox≠0
Mobile ions
metal
Oxide traped
charges K+ Na+
+ + + oxide
- - -
Fixed oxide charges + + + + +
x x x x x x x x x x x
silicon
Interface trap charges
Low-frequency C-V Characteristics for
MOS Capacitor on P-type Substrate
• MOS capacitance is non-
linear function of voltage.
Low frequency • Total capacitance in any
region dictated by the
separation between
capacitor plates.
High frequency • Total capacitance modeled
as series combination of
fixed oxide capacitance and
voltage-dependent depletion
Deep depletion
layer capacitance.
