COMPUTER ORGANIZATION

AND ASSEMBLY LANGUAGE

Lecture 19 & 20
Instruction Formats
PDP-8,PDP-10,PDP-11 & VAX
Course Instructor: Engr. Aisha Danish
Instruction Formats
 An instruction format defines the layout of the bits
of an instruction, in terms of its constituent fields
 Must include an opcode and, implicitly or
explicitly, zero or more operands
 The format must, implicitly or explicitly, indicate
the addressing mode for each operand
 For most instruction sets, more than one instruction
format is used
Instruction Formats: Design Issues

Instruction Length
 This decision affects, and is affected by, memory size,
memory organization, bus structure, processor
complexity, and processor speed
 Determines the richness and flexibility of the machine
as seen by the assembly-language programmer
 The most obvious trade-off here is between the desire
for a powerful instruction repertoire and a need to
save space
 Instruction Formats: Design Issues
 Programmers want more opcodes, more operands, more addressing modes, and
greater address range.
 More opcodes and more operands: shorter programs can be written to
accomplish given tasks
 More addressing modes: flexibility in implementing certain functions
 Increase in main memory size and the increasing use of virtual memory: allows
programmers to be able to address larger memory ranges
 Opcodes, operands, addressing modes, address range, require bits and push in
the direction of longer instruction lengths
 Longer instruction length may be wasteful
 A 64-bit instruction occupies twice the space of a 32-bit instruction but is
probably less than twice as useful
 Instruction Formats: Design Issues
 Either the instruction length should be equal to the memory-transfer length
(in a bus system, data-bus length) or one should be a multiple of the other.
 Otherwise, we will not get an integral number of instructions during a fetch
cycle
 A related consideration is the memory transfer rate. Memory can become a
bottleneck if the processor can execute instructions faster than it can fetch
them. One solution to this problem is to use cache memory, another is to
use shorter instructions.
 Instruction length should be a multiple of the character length, which is
usually 8-bits
 The word length of memory is, in some sense, the “natural” unit of
organization
 Instruction Formats: Design Issues
Allocation of Bits
 For a given instruction length, there is clearly a trade-off between

the number of opcodes and the power of the addressing capability

 More opcodes obviously mean more bits in the opcode field

 For an instruction format of a given length, this reduces the number

of bits available for addressing

 Use of variable-length opcodes: In this approach, there is a

minimum opcode length but, for some opcodes, additional

operations may be specified by using additional bits in the
instruction
 For a fixed-length instruction, this leaves fewer bits for addressing.

Thus, this feature is used for those instructions that require fewer
operands and/or less powerful addressing.
 Instruction Formats: Design Issues
The following interrelated factors go into determining
the use of the addressing bits
 Number of addressing modes

 Number of operands

 Register versus memory

 Number of register sets

 Address range

 Address granularity
Number of addressing modes
 Sometimes an addressing mode can be indicated
implicitly
 In other cases, the addressing modes must be
explicit, and one or more mode bits will be needed
Number of operands
 Typical instructions on today’s machines provide
for two operands
 Each operand address in the instruction might
require its own mode indicator, or the use of a
mode indicator could be limited to just one of the
address fields
Register versus memory
 A machine must have registers so that data can be brought into the
processor for processing
 With a single user-visible register (usually called the accumulator), one
operand address is implicit and consumes no instruction bits. However,
single-register programming is awkward and requires many instructions
 With multiple registers, only a few bits are needed to specify the register
 The more that registers can be used for operand references, the fewer
bits are needed
 A number of studies indicate that a total of 8 to 32 user-visible registers
is desirable
 Most contemporary architectures have at least 32 registers
Number of register sets
 Most contemporary machines have one set of general purpose
registers, with typically 32 or more registers in the set
 Can be used to store data and can be used to store addresses for
displacement addressing
 Some architectures, including that of the x86, have a collection of
two or more specialized sets (such as data and displacement)
Advantage
 For a fixed number of registers, a functional split requires fewer bits
to be used in the instruction
 For example, with two sets of eight registers, only 3 bits are required
to identify a register; the opcode or mode register will determine
which set of registers is being referenced.
Address range
 For addresses that reference memory, the range of
addresses that can be referenced is related to the
number of address bits
 Because this imposes a severe limitation, direct
addressing is rarely used
 With displacement addressing, the range is opened up
to the length of the address register. Even so, it is still
convenient to allow rather large displacements from
the register address, which requires a relatively large
number of address bits in the instruction
PDP-8
 PDP stands for Programmed Data Processor
 Second Generation
 One of the simplest instruction designs for a
general-purpose computer
 The PDP-8 uses 12-bit instructions and operates on
12-bit words
 There is a single general-purpose register, the
accumulator
PDP-8 Instruction Formats
 PDP-10
 Emphasis on making the system easy to program, even if additional hardware
expense was involved
 Design principles employed in designing the instruction set were the following
 Orthogonality:
A principle by which two variables are independent of each other
The term indicates that other elements of an instruction are independent of (not
determined by) the opcode
An address is always computed in the same way, independent of the opcode.
This is in contrast to many machines, where the address mode sometimes
depends implicitly on the operator being used.
 Completeness: Each arithmetic data type (integer, fixed-point, floating-point)
should have a complete and identical set of operations.
 Direct addressing: Base plus displacement addressing, which places a memory
organization burden on the programmer, was avoided in favor of direct
addressing.
PDP-10 Instruction Format
Variable-Length Instructions
 So far we have discussed a single fixed instruction length
 Designer may choose to provide a variety of instruction formats of
different lengths
Advantages
 Makes it easy to provide a large repertoire of opcodes, with different
opcode lengths
 Addressing can be more flexible, with various combinations of register
and memory references plus addressing modes
 With variable-length instructions, these many variations can be provided
efficiently and compactly
Disadvantage
 Increase in the complexity of the processor.
Variable-Length Instructions
 Falling hardware prices, the use of microprogramming, and a
general increase in understanding the principles of processor
design have all contributed to making this (complexity of
hardware) a small price to pay
 The use of variable-length instructions does not remove the
desirability of making all of the instruction lengths integrally
related to the word length
 Because the processor does not know the length of the next
instruction to be fetched, a typical strategy is to fetch a number
of bytes or words equal to at least the longest possible instruction
 This means that sometimes multiple instructions are fetched
PDP-11
 The PDP-11 was designed to provide a powerful and
flexible instruction set within the constraints of a 16-
bit minicomputer
 The PDP-11 employs a set of eight 16-bit general-
purpose registers
 Two of these registers have additional significance:
one is used as a stack pointer for special purpose stack
operations, and one is used as the program counter,
which contains the address of the next instruction
PDP-11 Instruction Formats
VAX (Virtual Address eXtension)
 Most architectures provide a relatively small number of fixed instruction formats
 Two problems for the programmer

 First, addressing mode and opcode are not orthogonal. For example, for a given

operation, one operand must come from a register and another from memory, or
both from registers, and so on.
 Second, only a limited number of operands can be accommodated: typically up

to two or three
 Because some operations inherently require more operands, various strategies

must be used to achieve the desired result using two or more instructions.
 To avoid these problems, two criteria were used in designing the VAX

instruction
 format

1. All instructions should have the “natural” number of operands

2. All operands should have the same generality in specification
VAX (Virtual Address eXtension)
 The result is a highly variable instruction format. An instruction consists
of a 1- or 2-byte opcode followed by from zero to six operand specifiers,
depending on the opcode
 The minimal instruction length is 1 byte, and instructions up to 37 bytes
can be constructed
 The VAX instruction set provides for a wide variety of operations and
addressing modes
 A very powerful and flexible tool for developing programs.
 Efficient machine-language compilations of high-level language
programs
 Effective and efficient use of processor resources
 The penalty to be paid for these benefits is the increased complexity of
the processor compared with a processor with a simpler instruction set
and format
VAX (Examples)
Home Work
 William Stallings, Chapter 11,Problem No. 11.16 &
11.17