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Unit-I 80386DX Architecture

The document summarizes the architecture of the Intel 8086 microprocessor. It describes the 8086's functional blocks including the Execution Unit (EU) and Bus Interface Unit (BIU). The EU contains an ALU, general purpose registers including AX, BX, CX, DX, and flags that are set based on arithmetic/logic operations. The BIU handles fetching instructions and data from memory to pass to the EU for processing.

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62 views14 pages

Unit-I 80386DX Architecture

The document summarizes the architecture of the Intel 8086 microprocessor. It describes the 8086's functional blocks including the Execution Unit (EU) and Bus Interface Unit (BIU). The EU contains an ALU, general purpose registers including AX, BX, CX, DX, and flags that are set based on arithmetic/logic operations. The BIU handles fetching instructions and data from memory to pass to the EU for processing.

Uploaded by

joseph
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Unit-I 80386DX Architecture

History of 8086 microprocessor, Concept of


segmentation in 8086, 8086 Register block diagram

80386DX functional Block Diagram, PIN Description,


Register set, Flags, Physical address space, Data types
History of 8086
Architecture of 8086
The architecture of 8086 includes
Arithmetic Logic Unit (ALU)
Flags
General registers
Instruction byte queue
Segment registers
EU & BIU
The 8086 CPU logic has been partitioned into two
functional units namely Bus Interface Unit (BIU) and
Execution Unit (EU)

The major reason for this separation is to increase the


processing speed of the processor

The BIU has to interact with memory and input and


output devices in fetching the instructions and data
required by the EU

EU is responsible for executing the instructions of the


programs and to carry out the required processing
Architecture Diagram
Execution Unit
The Execution Unit (EU) has
Control unit
Instruction decoder
Arithmetic and Logical Unit (ALU)
General registers
Flag register
Pointers
Index registers
Execution Unit
Control unit is responsible for the co-ordination of all
other units of the processor.

ALU performs various arithmetic and logical


operations over the data.

The instruction decoder translates the instructions


fetched from the memory into a series of actions that
are carried out by the EU.
Execution Unit - Registers
General registers are used for temporary storage and
manipulation of data and instructions

Accumulator register consists of two 8-bit registers AL


and AH, which can be combined together and used as
a 16-bit register AX

Accumulator can be used for I/O operations and


string manipulation
Execution Unit - Registers
Base register consists of two 8-bit registers BL and BH,
which can be combined together and used as a 16-bit
register BX .

BX register usually contains a data pointer used for based,


based indexed or register indirect addressing.

Count register consists of two 8-bit registers CL and CH,


which can be combined together and used as a 16-bit
register CX .

Count register can be used as a counter in string


manipulation and shift/rotate instructions.
Execution Unit - Registers
Data register consists of two 8-bit registers DL and
DH, which can be combined together and used as a 16-
bit register DX.

Data register can be used as a port number in I/O


operations.

In integer 32-bit multiply and divide instruction the


DX register contains high-order word of the initial or
resulting number .
Execution Unit - Registers
Execution Unit - Flags
Execution Unit - Flags
Flags
Conditional Flags:
Set or reset by EU on the basis of the results of
arithmetic or logic operation
Control Flags (TF,IF,DF)

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