The PCI bus allows for expansion cards to be connected to a computer's motherboard, providing additional input/output ports. It uses a 124-pin connector and supports high-speed data transfer through features like burst mode. The PCI bus connects peripherals directly to the motherboard via a bridge chip and employs signal lines like CLK, FRAME, AD, and IRDY/TRDY to facilitate communication between devices on the bus.
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Pci Bus
The PCI bus allows for expansion cards to be connected to a computer's motherboard, providing additional input/output ports. It uses a 124-pin connector and supports high-speed data transfer through features like burst mode. The PCI bus connects peripherals directly to the motherboard via a bridge chip and employs signal lines like CLK, FRAME, AD, and IRDY/TRDY to facilitate communication between devices on the bus.
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PCI BUS
• I/O device is connected to a computer using an interface circuit.
• The I/O devices fitted with an interface circuit suitable for one computer may not be usable with other computer.
• A different interface may have to be designed for every combination
of I/O device and computer, resulting in many different interfaces. Three widely used bus standards-
1)PCI (peripheral component interconnect)
2)SCSI (small computer system interface)
3)USB(universal serial bus)
PCI BUS The PCI bus was developed at very low cost bus that is truly processor independent. An important feature that the PCI is a plug -and -play capability for connection I/O devices. In todays computer most of the memory transfer involve a burst of data rather than just a word .The PCI is designed primarily to support this mode of operation. • Stands for "Peripheral Component Interconnect." PCI is a hardware bus used for adding internal components to a desktop computer . For example, a PCI card can be inserted into a PCI slot on a motherboard , providing additional I/O ports on the back of a computer.
• Peripheral Component Interconnect is a common connection interface
for attaching computer peripherals to its motherboard . • PCI was popular between 1995 and 2005 and was most often used to connect sound cards and network cards . PCI was also used to connect video cards to the motherboard, but graphics demand from gaming made it inadequate for that use.
• Modern computers mainly use other interface technologies like USB
or PCI Express (PCIe). Some desktop computers might have PCI slots on the motherboard to maintain backward compatibility, but the devices that used to be attached as PCI expansion cards are now either integrated onto motherboards or attached by other connectors like PCIe. • The bus supports 3 independent address spaces – Memory , I/O and configuration • A master is called an initiator in PCI terminology .The Addressed device is called a target. • The master maintains the address information on the bus. • The address is needed on the bus for one clock cycle only ,freeing the address lines to be used for sending data in subsequent clock cycle. FEATURES- • Synchronous Bus Architecture: PCI is a synchronous Bus . All data transfers in PCI bus takes place according to a system clock. The first PCI which was launched by Intel , supports 33 Mhz maximum clock rate while the newer PCI Buses now supports maximum clock frequency of 66 MHz. • 64 Bit Addressing: PCI Bus also supports 64 bit addressing. With PCI Bus, 64 Bit addressing can be implemented with the same 32 Bit connector. Dual address cycles are issued in which the lower order 32 bits addresses are driven onto during the first address phase and higher order 32 bits are driven onto during a second address phase. It does not requires a longer connector with additional 32 bit data signals (As required by the 64 bit data bus.) • Linear Burst Mode Data Transfer: PCI supports the feature of 'Burst Data Transfer'. With Burst Data Transfer, the data can be transferred at very high speeds. In Burst Data Transfer, a single address cycle can be followed by multiple data cycles. Thus , in Burst Data Transfer, Data is read and written to a single address location, which goes on automatically increment. In short, the data will be present on the bus, on each clock cycle. With this, we can achieve very high data transfer speeds that is 266 MB/sec for 32 bit data. With each clock cycle, a new data will be placed on the bus. If the cycle frame signal is active only for one data cycle, an ordinary transfer takes place. But if it is active for multiple clock cycles then the Burst Data Transfer takes place. • Large Bandwidth-PCI can handle both 32 bit as well as 64 bit data hence the maximum bandwidth will be 132 MB per sec.
• Speed-speed is the main function as it can transfer upto 132 MB per
sec.
• signalling environment-it supports both 3.3 and 5volt signaling
environment. HOW DOES IT WORKS • A PCI bus lets you change different peripherals that are attached to the computer system, so it allows the use of different sound cards and hard drives. • Usually, there are three or four PCI slots on a motherboard. With PCI, you can unplug the component you want to swap and plug in the new one in the PCI slot. Or, if you have an open slot, you can add another peripheral like a second hard drive to dual boot your computer, or a special sound card if you deal with music a lot. • Computers might have more than one type of bus handling different traffic types. The PCI bus used to come in both 32-bit and 64-bit versions. PCI runs at 33 MHz or 66 MHz. • PCI bus is a high performance connection between the motherboard components and expansion board of the system. • There is a bridge chip between the processor and the PCI bus ,which connects PCI bus with local bus and this allows to connect PCI peripherals directly to the PCI bus. • When a host bridge chip is included in the system ,the processor can access all available PCI peripherials. • PCI bus employs a 124 pins ,microchannel connector. SIGNAL LINES IN PCI CONFIGURATION • CLOCK(CLK) • FRAME • ADDRESS/DATA(A/D) • COMMAND/BYTE ENABLE(C/BE) • INITIATOR READY(IRDY) • TARGET READY(TRDY) • DEVICE SELECT(DEVSEL) • REQUEST(REQ) • GRANT(GNT) • CLK-providing time for all transactions. • Frame-sent by the initiatorto indicate the duration of a transaction and driven by the current master. • AD-multiplexed lines used for address and data. • C/BE-Multiplexed bus command and byte enable signals.During the data phase ,the lines indicate which of the four byte lines carry the meaningful data. • IRDY -Driven by current bus master (initiator of transaction).During a read,indicates that the master is prepared to accept data during a write ,indicates that valid data is present on AD.
• TRDY-Driven by the target.(selected device)
• DEVSEL(device select)- A response from the device indicating that it has
recognized its address and is ready for a data transfer transaction . • Request(REQ)-Indicates to the arbiter that this device requires use of bus. • Grant(GNT)-Indicates to thedevice that the arbiter has granted bus access.