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Instruction Format 8086

The document discusses the instruction formats of the 8086 microprocessor. It describes the six general instruction formats as being 1-byte, 2-byte, 3-byte, 4-byte, 5-byte, and 6-byte formats. Each format contains fields like opcode, mod, reg, r/m, displacement, and immediate data. The fields provide information on operations, operands, addressing modes, segment registers, and data sizes. Instruction templates define the arrangement and purpose of each field to encode operations and addresses for the 8086 instruction set.

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0% found this document useful (0 votes)
236 views15 pages

Instruction Format 8086

The document discusses the instruction formats of the 8086 microprocessor. It describes the six general instruction formats as being 1-byte, 2-byte, 3-byte, 4-byte, 5-byte, and 6-byte formats. Each format contains fields like opcode, mod, reg, r/m, displacement, and immediate data. The fields provide information on operations, operands, addressing modes, segment registers, and data sizes. Instruction templates define the arrangement and purpose of each field to encode operations and addresses for the 8086 instruction set.

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nikitha0211
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© © All Rights Reserved
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UNIT-2

 Addressing Modes of 8086


 Instruction Formats of 8086
 Instruction Set of 8086
 Assembler Directives
 Simple Programs
 Procedures And Macros

1
Instruction Formats Of 8086
 A machine language format has one or more number of fields
associated with it.
 The first field is called as operation code(Opcode) field,
which indicates the type of the operation to be performed by
the CPU.
 The instruction format also contains other fields known as
Operand(data) fields. The CPU executes the instruction using
the information which resides in these fields.
 There are six general formats of instructions in 8086
instruction set. The length of an instruction may vary from
one byte to six bytes.
 The instruction formats are also known as instruction
templates.

2
Instruction Formats
 One Byte Instruction Format:
This format is only one byte long and may have the implied data or
register operands.
The least significant 3-bits of the opcode are used for specifying the
register operand, if any.Otherwise, all the 8-bits form an opcode and
the operands are implied.
7 0 7 0
Opcode or Opcode W

7 0 7 32 0
or
Opcode Z Opcode Reg.

3
Instruction Formats
 Two Byte Instruction:
Used for Register to register and register to/from memory with no
displacement.
This format is 2 byte long
The first byte of the code specifies the operation code and the width of
the operand specified by W bit.
The second byte of the code shows the register operands and R/M
field.
The register specified by Reg. field is one operand and the R/M field
specifies another register or memory location i.e., the other operand.
The mod field will be specifying the addressing mode of the operand.
7 2 1 0 7 6 5 3 2 0
opcode D W Mod Reg. R/M
(or)

7 2 1 0 7 6 5 3 2 0
opcode V W Mod Reg. R/M
4
Instruction Formats
 Three Byte Instruction:
Used for register to/from memory with 8-bit displacement or 8-bit
immediate data.
This format is 3 byte long
The first two bytes are similar to the two byte instruction format, and
have all the fields of two bytes same.
7 2 1 0 7 6 5 3 2 0 7 0
opcode D W Mod Reg. R/M Disp-8

(or)
7 2 1 0 7 6 5 3 2 0 7 0

opcode D W Mod Reg. R/M Data-8

5
Instruction Formats
 Four Byte Instruction:
Used for register to/from memory with 16-bit displacement and also
for 16-bit immediate data to Register/Memory .
This format is 4 byte long
The format of instruction for register to/from memory with 16-bit
displacement, there will be two bytes of displacement along with the
first two bytes similar to two byte instruction,its format is as shown
below:
7 2 1 0 7 6 5 3 2 0 7 0
opcode D W Mod Reg. R/M Disp. Lower Byte

7 0
Disp. Higher Byte

6
Instruction Formats
 Four Byte Instruction:
The format of instruction for moving 16-bit immediate data to
register/memory will have the first byte as well as the 3-bits of second
byte which were used for Reg. field by two byte instruction as opcode
fields.
The following bytes i.e., third and fourth bytes as 16-bit immediate
data.
The format of instruction for moving 16-bit immediate data to
register/memory will have the following template.
7 2 1 0 7 6 5 3 2 0 7 0
opcode D W Mod Reg. R/M Data Lower Byte

7 0
Data Higher Byte

7
Instruction Formats
 Five Byte Instruction:
Used for moving immediate 8-bit data to memory with 16-bit displacement.
This is five byte long template.
The format of instruction will have the first byte as well as the 3-bits of
second byte which were used for Reg. field by two byte instruction as
opcode fields.
The next two bytes will be the 16-bit displacement bytes.
The last byte is an 8-bit data.
The format of the template is:
7 2 1 0 7 6 5 3 2 0 7 0
opcode D W Mod Reg. R/M Disp. Lower Byte

7 0 7 0
Disp. Higher Byte Data Byte

8
Instruction Formats
 Six Byte Instruction:
Used for moving immediate 16-bit data to memory with 16-bit displacement.
This is six byte long template.
The format of instruction will have the first byte as well as the 3-bits of
second byte which were used for Reg. field by two byte instruction as
opcode fields.
The next two bytes will be the 16-bit displacement bytes.
The next two bytes is 16-bit data.
The format of the template is:
7 2 1 0 7 6 5 3 2 0 7 0
opcode D W Mod Reg. R/M Disp. Lower Byte

7 0 7 0 7 0
Disp. Higher Byte Lower Data Byte Higher Data Byte

9
Instruction Formats
 The templates have the single bit indicators their significance
is as given below:
o W-bit: indicates whether the instruction is to operate over an 8-bit or
16-bit data/operand.
W=0 if the operand is of 8-bit,W=1 if the operand is of 16-bit.
o D-bit: destination
D=0, If the register specified by REG field is source operand.
D=1, If the register specified by REG field is destination operand.
o S-bit: Sign extension bit
if s=0,w=0 => 8-bit operation with 8-bit immediate operand
if s=0,w=1 => 16-bit operation with 16-bit immediate
operand
if s=1,w=1 => 16-bit operation with a sign extended immediate data.
o V-bit: used in case of shift & rotate instruction
v=0 if shift count is 1
v=1 if CL contains shift count
10
Instruction Formats
 The templates have the single bit indicators their significance is as given
below:
o Z-bit: used by REP instruction to control the loop.
If z=1, REP prefix is executed until zero flag matches the Z-bit.
 Reg. field:
This 3-bit reg. field is used to indicate the source or destination of operand along
with d-bit. If d=0, then the register specified by reg. field is source operand. If d=1,
then the register specified by reg. field is destination operand. The register can be
8-bit/16-bit register as specified by the w-bit.
 R/M field :
This 3-bit field is used to indicate the source or destination of operand. If
register specified by reg. field is source of operand then r/m field is used to
indicate destination operand or vice versa.
 Mod field :
This 2-bit mod field defines the method of addressing the operand
specified by the r/m field.

11
Instruction Formats
 Codes for Mod field

Code for Mod Name of the Mode


Field
00 Memory mode with
No displacement
01 Memory mode with an 8-bit
signed displacement
10 Memory mode with 16-bit
unsigned displacement
11 Register Mode

12
Instruction Formats
 Codes for Segment Registers

Code for SEG. Name of the SEG.


Registers Register
00 ES
01 CS
10 SS
11 DS

 Usually all the addressing modes have DS as default segment, but the
instructions/Addressing modes using SP and BP for Effective Address
calculation use Stack segment as default segment.

13
Instruction Formats
 Codes for Reg. field

Code for Name of the register represented by code


Reg. field when W= 0 or 1
When W = 0 When W = 1

000 AL AX
001 CL CX
010 DL DX
011 BL BX
100 AH SP
101 CH BP
110 DH SI
111 BH DI

14
Instruction Formats
 Codes for R/M field

Code for Effective Address calculation when Mod = 00/01/10


R/M field Mod = 00 Mod = 01 Mod = 10

000 [BX + SI] [BX + SI + Disp.8] [BX + SI + Disp.16]


001 [BX + DI] [BX + DI + Disp.8] [BX + DI + Disp.16]
010 [BP + SI] [BP + SI + Disp.8] [BP + SI + Disp.16]
011 [BP + DI] [BP + DI + disp.8] [BP + DI + disp.16]
100 [SI] [SI + disp.8] [SI + disp.16]
101 [DI] [DI + disp.8] [DI + disp.16]
110 [DISP. 16] [BP + Disp.8] [BP + Disp.16]
111 [BX] [BX + Disp.8] [BX + Disp.16]

 Disp.8  8-bit signed displacement


Disp.16  16-bit unsigned displacement
15

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