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Digital Logic & Processors: Design Concepts of ALU: Arithmetic Functions

The document discusses the design and operation of an arithmetic logic unit (ALU). It describes how an ALU can perform both arithmetic and logical operations on two input numbers. Specific circuits like half adders, full adders, and 4-bit adders/subtractors are examined. Operations like addition, subtraction, AND, OR and flags are explained. 1's and 2's complement representations are also covered along with how they enable subtraction using addition.
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0% found this document useful (0 votes)
71 views23 pages

Digital Logic & Processors: Design Concepts of ALU: Arithmetic Functions

The document discusses the design and operation of an arithmetic logic unit (ALU). It describes how an ALU can perform both arithmetic and logical operations on two input numbers. Specific circuits like half adders, full adders, and 4-bit adders/subtractors are examined. Operations like addition, subtraction, AND, OR and flags are explained. 1's and 2's complement representations are also covered along with how they enable subtraction using addition.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Digital Logic & Processors

Design concepts of ALU: Arithmetic


functions
Design Specifications of ALU

Arithmetic logic unit (ALU) is a digital circuit


used to perform arithmetic and logic operations. ALU

• Examples of arithmetic operations are addition, Arithmetic Unit


subtraction, multiplication, and division.

• Logic operations like NOT, AND, OR, etc., and


Logical Unit
comparison of two numbers.

• To perform addition operation ,adder circuits are


used. (half adder , full adder and binary parallel
adder)
07/21/2021 Source: Confidential 3
07/21/2021 Source: Confidential 4
Design Specifications of ALU
• ALU will take numbers (A & B) as input and performs particular arithmetic &
logical operations inside the ALU and produce the results out.
• The Flag register is a Special Purpose Register. Depending upon the value of
result after any arithmetic and logical operation the flag bits become set (1) or
reset (0).

Flag Registers
Simple ALU unit
• S(sign Flag): if the MSB (D7) of the result is 1, it indicates the number is negative
and the sign flag becomes set, i.e. 1. otherwise it becomes reset i.e. 0.
• Zero Flag (Z) : After any arithmetical or logical operation if the result is 0, the
zero flag becomes set i.e. 1, otherwise it becomes reset i.e. 0.
Design Specifications of ALU

• Auxiliary Carry Flag (AC) – If after any arithmetic or logical operation
D(3) generates carry and passes on to D(4) this flag becomes set i.e. 1,
otherwise it becomes reset i.e. 0.
• Parity Flag (P) – If after any arithmetic or logical operation the result has
even number of 1 bits, the parity flag =1, otherwise it reset to 0.
• Carry Flag (CY) – Carry is generated when performing n bit operations
and the result is more than n bits, then this flag becomes set i.e. 1,
otherwise it becomes reset i.e. 0.
4 Bit Binary Adder
Example:
 𝐀𝟑 𝐀 𝟐 𝐀 𝟏 𝐀 𝟎
1 1 0 1  𝐁 𝐁 𝐁 𝐁
𝟑 𝟐 𝟏 𝟎
1 0 1 1  𝟏 𝐂
𝐂  𝟐 𝐂   𝟎 𝐂
  𝐢𝐧
1 1 1
𝐂  𝐎𝐮𝐭 𝐒  𝟑 𝐒  𝟐 𝐒  𝟏 𝐒  𝟎
11 0 0 0
07/21/2021
Half Adder
HALF ADDER:
• It adds two bits of data and generate sum and carry.
• It has 2 inputs and 2 outputs
Truth Table:
Block Diagram:
A B SUM CARRY
A SUM 0 0 0 0
0 1 1 0
B CARRY 1 0 1 0
1 1 0 1
Logic Diagram:
Out put Expressions:
SUM= A’B+AB’=A ⊕ B A
A⊕B
CARRY=AB B

AB
Full Adder
FULL ADDER:

• It adds three bits of data and generate sum and carry.

• It has 3 inputs and 2 outputs

Block Diagram

A SUM

B
CARRY
C
Full Adder
FULL ADDER:
• It adds three bits of data and generate sum and carry.
• It has 3 inputs and 2 outputs

Output Expressions:
Truth Table

A B C SUM CARRY
SUM = ∑m(1,2,4,7)
= A’.B’.C+A’.B.C’+A.B’.C’+A.B.C 0 0 0 0 0
0 0 1 1 0
CARRY= ∑m(3,5,6,7) 0 1 0 1 0
= A’.B.C+A.B’.C+A.B.C’+A.B.C 0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Full Adder
Logic Diagram:
SUM = A’.B’.C+A’.B.C’+A.B’.C’+A.B.C
CARRY = A’.B.C+A.B’.C+A.B.C’+A.B.C
Full Adder
Using two half-adders:
1’s Complement
Note: To find 1’s complement invert 1 to 0 and 0 to 1

Example: find the 1’s complement for 101

1 0 1

0 1 0
Example: find the 1’s complement for 1100

1 1 0 0

0 0 1 1
2’s Complement
Example: find the 2’s complement for 101
1 0 1 Perform 1’s complement
and add 1
1’s complement 0 1 0
0 0 1
2’s complement 0 1 1
Example: find the 2’s complement for 1100

1 1 0 0 Perform 1’s complement


and add 1
1’s complement 0 0 1 1
0 1 1 1
2’s complement 0 1 0 0
1’s Complement Subtraction
• A-B = A + (-B)
• Procedure for 1’S complement subtraction:
 First represent B in 1’s complement form
 Perform addition between A and –B
 In result, if carry is generated then perform end
around carry.
 In result, if carry is not generated then perform 1’s
complement of result and put minus sign.
1’S Complement Subtraction
• Example:
9 1 0 0 1
(-)
4 0 1 0 0 4 0 1 0 0

+9 1 0 0 1 -4 1 0 1 1
(+)
-4 1 0 1 1
0 1 1
1 0 1 0 0 If Carry is generated
then perform end
0 0 0 1
around carry
0 1 0 1

 
1’S Complement Subtraction
• Example:
4 0 1 0 0
(-)
9 1 0 0 1 9 1 0 0 1

+4 0 1 0 0 -9 0 1 1 0
(+)
-9 0 1 1 0
1 0 0
1 0 1 0 If Carry is not generated
then perform 1’s
complement of result and
- ( 0 1 0 1) put minus sign

 
2’S Complement Subtraction

• A-B = A + (-B)
• Procedure for2’S complement subtraction
 First represent B in 2’s complement form
 Perform addition between A and –B
 In result, if carry is generated then discard the carry
 In result, if carry is not generated then perform 2’s
complement of result and put minus sign.
2’S Complement Subtraction
• Example:
9 1 0 0 1
(-)
4 0 1 0 0 4 0 1 0 0

+9 1 0 0 1 -4 1 0 1 1
(+)
-4 1 1 0 0 0 1 1 1
0 0 0 1 1 0 0
1 0 1 0 1 If Carry is generated
then discard the carry

 
2’S Complement Subtraction
• Example:
5 0 1 0 1
(-)
9 1 0 0 1 9 1 0 0 1

+5 0 1 0 1 -9 0 1 1 0
(+)
-9 0 1 1 1 0 0 0 1
1 1 1 0 1 1 1
1 1 0 0 If Carry is not
generated then find 2’s
0 0 1 1 complement of answer
0 1 1 1 and put minus sign
-(0 1 0 0)

 
4-Bit Subtractor using 2’s Complement
4-Bit Adder/Subtractor using 2’s Complement

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