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Risc and Cisc: Set Computer & Reduced Instruction Set Computer

The document summarizes the differences between RISC (reduced instruction set computer) and CISC (complex instruction set computer) architectures. It discusses their histories, key characteristics like instruction sets and hardware complexity, and compares their advantages and disadvantages. The conclusion is that modern processors take a hybrid approach, combining aspects of both RISC and CISC to get the best of both worlds.

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Alia Bashir
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0% found this document useful (0 votes)
65 views14 pages

Risc and Cisc: Set Computer & Reduced Instruction Set Computer

The document summarizes the differences between RISC (reduced instruction set computer) and CISC (complex instruction set computer) architectures. It discusses their histories, key characteristics like instruction sets and hardware complexity, and compares their advantages and disadvantages. The conclusion is that modern processors take a hybrid approach, combining aspects of both RISC and CISC to get the best of both worlds.

Uploaded by

Alia Bashir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Complex Instruction

Set Computer &


Reduced Instruction
Set Computer.
RISC and CISC

By: Sania Shahzad &


Farheen Masood

LOGO
LOGO Contents

1 History of CISC and RISC

2 CISC and RISC

3 Comparison

4 Disadvantages

5 Summary
LOGO History of RISC/CISC

RISC chip was developed at IBM by John


Cocke in 1974. 
1978, a 16-bit CISC chip was used by Intel's
8086 processor.
RISC-I processor in 1982, and the RISC-II
in 1983. 
CISC was used by Motorola's 68040
computer processor and Intel's 80486 in the
1980s.
LOGO What’s the RISC?
 RISC is a microprocessor design approach using simple
instructions.
 Elements that define a RISC processor are following:
 Single-cycle operation aids in fast execution of simple functions
 Load/Store architecture implemented due to the desired single-cycle
operation
 Hardwired control provides for the fastest possible single-cycle
operation
 Relatively few instructions and addressing modes makes it easy for the
control unit to interpret instructions
 Fixed instruction format makes decoding of instructions fast and easy
 More compile-time effort offers opportunity to explicitly move static
run-time complexity into compiler.
 Pipleling
LOGO Diagram
LOGO What exactly is CISC?
 Uses complex instructions intended for direct
implementation of high-level language operations.
 made up of smaller, simpler instructions.
 CISC microprocessors have the following characteristics:
 Multi-cycle operation due to variable execution time of instructions
 Not a load/store machine
 Relies on micro-coded control engine
 More instructions and addressing modes like that of a high-level
programming language
 Variable-length instruction format dependent on the number of
operands and addressing modes used
 Difficult targets for optimizing compilers because of complex
instructions
LOGO
LOGO

Factor RISC CISC

Complex architecture make it


Implementation Simple architecture makes RISC difficult to implement on a
Feasibility being realizable at earlier date single chip with the design
rules at that time
Lengthened design time may
lead to problems such as
Design that can be easier to design
having a machine with an old
and debug can use much superior
Design Time technology than design that takes
technology, or trying to predict
future technology and have a
a long time to implement
go at attempting to build that
technology
Gains in speed from better use of
chip area and from simple design –
More instructions and
with less instructions and
Speed addressing modes, these would
addressing modes result to
complicated control structure
lead to a less complicated control
structure
Area left on chip due to simple
design may be used to make Complex design leaves no room
Use of Chip Area RISC improve performance on chip for enhancements
even more
LOGO Comparison
LOGO Cisc Disadvantages
 Instruction set & chip hardware become more complex
with each generation of computers.
 Different instructions will take different amounts of clock
time to execute, slowing down the overall performance of
the machine.
 Setting the condition codes take time
 Programmers have to remember to examine the condition
code bits before a subsequent instruction changes them.
LOGO Risc Disadvantages

 RISC architectures put a greater burden on the software.


LOGO Summary
 RISC design had advantages that result to a machine’s
excellent performance.
 The long RISC versus CISC debate was most certainly a good
thing as it allowed the industry to explore and come up with
solutions that have significantly raised the machine’s
performance.
 Both architectures have continuously developed and processors
today have a little bit of something from each architecture.
 Today, designers are producing a hybrid of the two design
philosophies known as a complex/reduced instruction set
computer. These computers combine characteristics such as
variable-length instructions, few general-purpose registers,
pipelining, and floating-point units.
LOGO Summary
 Today, designers are producing a hybrid of the two design
philosophies known as a complex/reduced instruction set
computer. These computers combine characteristics such as
variable-length instructions, few general-purpose registers,
pipelining, and floating-point units.

RISC and
CISC:
The Best
Of Both
Worlds

(AltiVec unit adds 162 new instructions to the existing


RISC architecture)
LOGO

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