UNIT – III

I/O and Memory Interface

Interfacing 16×2 LCD with 8051

Introduction
• Cathode Ray Tubes use huge power when compared with
LCDs, and CRTs heavier as well as bigger.
• These devices are thinner as well power consumption is
extremely less.
• It blocks the light rather than dissipate.
What is the LCD 16×2?

The term LCD stands for liquid Crystal Display

It is one kind of electronic display module used in an extensive range of applications
like various circuits & devices like mobile phones, calculators, computers, TV sets, etc.
These displays are mainly preferred for multi-segment light emitting diodes and seven
segments.
The main benefits of using this module are inexpensive; simply programmable,
animations, and there are no limitations for displaying custom characters, special and
even animations, etc
Pin No: Name  Function

1 VSS This pin must be connected to the ground

2 VCC  Positive supply voltage pin (5V DC)

3 VEE Contrast adjustment

4 RS Register selection

5 R/W Read or write

6 E  Enable

7 DB0  Data

8 DB1  Data

9 DB2  Data

10 DB3  Data

11 DB4  Data

12 DB5  Data

13 DB6  Data

14 DB7  Data

15 LED+  Back light LED+

16 LED-  Back light LED-

Features of LCD16x2

The features of this LCD mainly include the following.

The operating voltage of this LCD is 4.7V-5.3V

It includes two rows where each row can produce 16-characters.
The utilization of current is 1mA with no backlight
Every character can be built with a 5×8 pixel box
The alphanumeric LCDs alphabets & numbers
Is display can work on two modes like 4-bit & 8-bit
These are obtainable in Blue & Green Backlight
It displays a few custom generated characters

Registers of LCD

A 16×2 LCD has two regisers like data register and command register. The RS (register
select) is mainly used to change from one register to another. When the register set is ‘0’,
then it is known as command register. Similarly, when the register set is ‘1’, then it is
known as data register and put the data in the 8 bit data line (DB0 to DB7)
Command Register

The main function of the command register is to store the instructions of command
which are given to the display. So that predefined tasks can be performed such as
clearing the display, initializing, set the cursor place, and display control. Here
commands processing can occur within the register.

Data Register

The main function of the data register is to store the information which is to be
exhibited on the LCD screen. Here, the ASCII value of the character is the
information which is to be exhibited on the screen of LCD. Whenever we send the
information to LCD, it transmits to the data register, and then the process will be
starting there. When register set =1, then the data register will be selected.
R/W pin is meant for selecting between read and write modes. High level at this pin
enables read mode and low level at this pin enables write mode.

E pin is for enabling the module. A high to low transition at this pin will enable the
module.

DB0 to DB7 are the data pins. The data to be displayed and the command  instructions are
 placed on these pins.

LED+ is the anode of the back light LED and this pin must be connected to Vcc through a
suitable series current limiting resistor. LED- is the cathode of the back light LED and this
pin must be connected to ground.

16×2 LCD module commands.

16×2 LCD module has a set of preset command instructions. Each command will make
the module to do a particular task. The commonly used commands and their function are
given in  the  table below.
Command                       Function

0F LCD ON, Cursor ON, Cursor blinking ON

01 Clear screen

02 Return home

04 Decrement cursor

06 Increment cursor

0E Display ON ,Cursor blinking OFF

80 Force cursor to the beginning of  1st line

C0 Force cursor to the beginning of 2nd line

38 Use 2 lines and 5×7 matrix

83 Cursor line 1 position 3

3C Activate second line

08 Display OFF, Cursor OFF

C1 Jump to second line, position1

OC Display ON, Cursor OFF

C1 Jump to second line, position1

C2 Jump to second line, position2

LCD initialization.

The steps that has to be done for initializing the LCD display is given below and these steps are
common for almost all applications.
•Send 38H to the 8 bit data line for initialization
•Send 0FH for making LCD ON, cursor ON and cursor blinking ON.
•Send 06H for incrementing cursor position.
•Send 01H for clearing the display and return the cursor.

Sending data to the LCD.

The steps for sending data to the LCD module is given below. I have already said that the LCD
module has pins namely RS, R/W and E. It is the logic state of these pins that make the module
to determine whether a given data input  is a command or data to be displayed.
•Make R/W low.
•Make RS=0 if data byte is a command and make RS=1 if the data byte is a data to be displayed.
•Place data byte on the data register.
•Pulse E from high to low.
•Repeat above steps for sending another data.
The circuit diagram given above shows how to interface a 16×2 LCD module with AT89S1
microcontroller.

 Capacitor C3, resistor R3 and push button switch S1 forms the reset circuitry.

 Ceramic capacitors C1,C2 and crystal X1 is related to the clock circuitry which produces the
system clock frequency.

P1.0 to P1.7 pins of the microcontroller is connected to the DB0 to DB7 pins of the module
respectively and through this route the data goes to the LCD module.

 P3.3, P3.4 and P3.5 are connected to the E, R/W, RS pins of the microcontroller and through
this route the control signals are transfered to the LCD module.

Resistor R1 limits the current through the back light LED and so do the back light intensity.
POT R2 is used for adjusting the contrast of the display.

 Program for interfacing LCD to 8051 microcontroller is shown below.

 Program.
MOV A,#38H // Use 2 lines and 5x7 matrix
ACALL CMND
MOV A,#0FH // LCD ON, cursor ON, cursor blinking ON
ACALL CMND
MOV A,#01H //Clear screen
ACALL CMND
MOV A,#06H //Increment cursor
ACALL CMND
MOV A,#82H //Cursor line one , position 2
ACALL CMND
MOV A,#3CH //Activate second line
ACALL CMND
MOV A,#49D
ACALL DISP
MOV A,#54D
ACALL DISP
MOV A,#88D
ACALL DISP
MOV A,#50D
ACALL DISP
MOV A,#32D
ACALL DISP
MOV A,#76D
ACALL DISP
MOV A,#67D
ACALL DISP
MOV A,#68D
ACALL DISP
 
MOV A,#0C1H //Jump to second line, position 1
ACALL CMND
MOV A,#67D
ACALL DISP
MOV A,#73D
ACALL DISP
MOV A,#82D
ACALL DISP
MOV A,#67D
ACALL DISP
MOV A,#85D
ACALL DISP
MOV A,#73D
ACALL DISP
MOV A,#84D
ACALL DISP
MOV A,#83D
ACALL DISP
MOV A,#84D
ACALL DISP
MOV A,#79D
ACALL DISP
MOV A,#68D
ACALL DISP
MOV A,#65D
ACALL DISP
MOV A,#89D
ACALL DISP
 
HERE: SJMP HERE
 
CMND: MOV P1,A
CLR P3.5
CLR P3.4 Subroutine CMND sets the logic of the RS, R/W, E pins of the
SETB P3.3 LCD module so that the module recognizes the input data
CLR P3.3 ( given to DB0 to DB7) as a command.
ACALL DELY Subroutine DISP sets the logic of the RS, R/W, E pins of the
RET
module so that the module recognizes the input data as a data to
 
DISP:MOV P1,A
be displayed .
SETB P3.5
CLR P3.4
SETB P3.3CLR P3.3
ACALL DELY
RET
 
DELY: CLR P3.3
CLR P3.5
SETB P3.4
MOV P1,#0FFh
SETB P3.3
MOV A,P1
JB ACC.7,DELY
 
CLR P3.3
CLR P3.4
RET
 
END
Interfacing hex keypad to 8051

Hex keypad.
• Hex key pad is essentially a
collection of 16 keys
arranged in the form of a
4×4 matrix.
• Hex key pad usually have
keys representing numeric's
0 to 9 and characters A to F.
• The simplified diagram of a
typical hex key pad is
shown in the figure below.
The hex keypad has 8 communication lines namely R1, R2, R3, R4, C1, C2, C3 and C4.

 R1 to R4 represents the four rows and C1 to C4 represents the four columns.

When a particular key is pressed the corresponding row and column to which the terminals of
the key are connected gets shorted.

For example if key 1 is pressed row R1 and column C1 gets shorted and so on.

The program identifies which key is pressed by a method known as column scanning.

In this method a particular row is kept low (other rows are kept high) and the columns are
checked for low.

If a particular column is found low then that means that the key connected between that
column and the corresponding row (the row that is kept low) is been pressed.

 For example if  row R1 is initially kept low and column C1 is found low during scanning, that
means key 1 is pressed.
The circuit  will display the character/numeric pressed on a seven segment LED display.

 The circuit is very simple and it uses only two ports of the microcontroller, one for the hex
keypad and the other for the seven segment LED display.

The hex keypad is interfaced to port 1 and seven segment LED display is interfaced to port 0 of
the microcontroller.

Resistors R1 to R8 limits the current through the corresponding segments of the LED display.

 Capacitors C1, C2 and crystal X1 completes the clock circuitry for the microcontroller.

Capacitor C3, resistor R9 and push button switch S1 forms a debouncing reset mechanism.
 Program.
ORG 00H
MOV DPTR,#LUT // moves starting address of LUT to DPTR
MOV A,#11111111B // loads A with all 1's
MOV P0,#00000000B // initializes P0 as output port
BACK:MOV P1,#11111111B // loads P1 with all 1's
CLR P1.0 // makes row 1 low
JB P1.4,NEXT1 // checks whether column 1 is low and jumps to NEXT1 if not low
MOV A,#0D // loads A with 0D if column is low (that means key 1 is pressed)
ACALL DISPLAY // calls DISPLAY subroutine
NEXT1:JB P1.5,NEXT2 // checks whether column 2 is low and so on...
MOV A,#1D
ACALL DISPLAY
NEXT2:JB P1.6,NEXT3
MOV A,#2D
ACALL DISPLAY
NEXT3:JB P1.7,NEXT4
MOV A,#3D
ACALL DISPLAY
NEXT4:SETB P1.0
CLR P1.1
JB P1.4,NEXT5
MOV A,#4D
ACALL DISPLAY
NEXT5:JB P1.5,NEXT6
MOV A,#5D
ACALL DISPLAY
NEXT6:JB P1.6,NEXT7
MOV A,#6D
ACALL DISPLAY
NEXT7:JB P1.7,NEXT8
MOV A,#7D
ACALL DISPLAY
NEXT8:SETB P1.1
CLR P1.2
JB P1.4,NEXT9
MOV A,#8D
ACALL DISPLAY
NEXT9:JB P1.5,NEXT10
MOV A,#9D
 ACALL DISPLAY
NEXT10:JB P1.6,NEXT11
MOV A,#10D
ACALL DISPLAY
NEXT11:JB P1.7,NEXT12
MOV A,#11D
ACALL DISPLAY
NEXT12:SETB P1.2
CLR P1.3
JB P1.4,NEXT13
MOV A,#12D
ACALL DISPLAY
NEXT13:JB P1.5,NEXT14
MOV A,#13D
ACALL DISPLAY
NEXT14:JB P1.6,NEXT15
MOV A,#14D
ACALL DISPLAY
NEXT15:JB P1.7,BACK
MOV A,#15D
ACALL DISPLAY
LJMP BACK
 DISPLAY:MOVC A,@A+DPTR // gets digit drive pattern for the current key from LUT
MOV P0,A // puts corresponding digit drive pattern into P0
RET
 LUT: DB 01100000B // Look up table starts here
DB 11011010B
DB 11110010B
DB 11101110B
DB 01100110B
DB 10110110B
DB 10111110B
DB 00111110B
DB 11100000B
DB 11111110B
DB 11110110B
DB 10011100B
DB 10011110B
DB 11111100B
DB 10001110B
DB 01111010B
END
About the program.

Firstly the program initializes port 0 as an output port by writing all 0’s to it and port 1 as an
input port by writing all 1’s to it.

Then the program makes row 1 low by clearing P1.0 and scans the columns one by one for low
using JB instruction.

If column C1 is found low, that means 1 is pressed and accumulator is loaded by zero and
DISPLAY subroutine is called.

The display subroutine adds the content in A with the starting address of LUT stored in DPTR
and loads A with the data to which the resultant address points (using instruction MOVC
A,@A+DPTR).

The present data in A will be the digit drive pattern for the current key press and this pattern is
put to Port 0 for display.

This way the program scans for each key one by one and puts it on the display if it is found to
be pressed.
Notes.

•The 5V DC power supply must be well regulated and filtered.

•Column scanning is not the only method to identify the key press. You can use row scanning
also. In row scanning a particular column is kept low (other columns are kept high) and the rows
are tested for low using a suitable branching instruction. If a particular row is observed low then
that means that the key connected between that row and the corresponding column (the column
that is  kept low) is been pressed. For example if  column C1 is initially kept low and row R1  is
observed low during scanning, that means key 1 is pressed.

•A membrane type hex keypad was used during the testing. Push button switch type and dome
switch type will also work.

•The display used was a common cathode seven segment LED display with type number
ELK5613A. This is just for information and any general purpose common cathode 7 segment
LED display will work here.
External ROM
For program/data
ROM is a type of non-volatile memory. The data is not lost, even if the power supply to the IC is
taken off. ROM can be classified into:
• PROM
• EPROM
• EEPROM
• Flash EPROM
• Mask ROM
External addressable ROM for the 8051 is of 128KB of address space which is be divided into two
parts:
• Program Code Space
• Data Memory Space
Program Code Space
• To access the program space, we require a program counter (PC), it locates and fetches
instructions. We use the MOVC A, @A+DPTR instruction to get data, where C stands for
code. It is 64K bytes in size.
How to access program space?
• For storing the program code, we can either use on-chip ROM or off-chip ROM or a
combination of both on-chip and off-chip ROM depending on the status of the EA pin.
1.Internal Program Memory (4KB) i.e. from 0000H to 0FFFH + External Program Memory (60KB) i.e.
from 1000H to FFFFH. We can select this mode by making EA = 1.
2.Total External Program Memory (64KB), i.e., over the entire range of 0000H to FFFFH. We can select
this mode by making EA = 0.

The external storage is addressed and accessed via I/O ports P0 & P2
In 8051,the PSEN =1(is active) when reading a byte from external program memory(ROM)
The command used to access external memory is
MOVC A,@A+DPTR
1.When we connect PSEN to the ground, then the 8051 microcontroller fetches the opcode from the
external ROM.
2.But, when we connect PSEN to VCC, the status of the PSEN is ‘not activated’ since it is an active low
pin. Hence, the program memory is saved in the internal ROM of 8051 itself.
Circuit diagram to interface external program ROM with 8051
3.Step 1: Connect EA pin to ground
4.Step 2: Connect the PSEN to the CE and OE.
5.Step 3: Then, Port 2 (P2.0 – P2.7) to A8 – A12 pins of ext. ROM.
6.Step 4: Connect ALE to G of 74LS373 latch to enable it.
7.Step 5: Next, connect the OC of 74LS373 to GND.
8.Step 6: Connect Port 0 (P0.0 – P0.7), which consists of both address and data multiplexed into Port 0
to 1D – 8D pins of 74LS373 latch to demultiplex it and 1Q – 8Q of the latch to A0 – A7 of ext. ROM.
9.Step 7: Connect Port 0 (P0.0 – P0.7) to D0 – D7 of the ext. ROM.
10.Step 8: VPP of ext. ROM to VCC.
Here 8K*8 means that the program ROM is organized in a structure that has an 8k word space
and the *8 then means that each word is 8-bits.

This means that 32K*8 would be a ROM which has a 32K word space,at 8 bits per word.

In other words it means that there are 32,000 locations that are 8-bit word.

The program & data memory can be a size of 1k*8, 2k*8 , 4k*8 , 8k*8 , 16k*8 , 32k*8 &
64k*8.

Also,multiple chips of smaller sizes cascades together to form a chip of larger size. i.e,we can
connect two 16K*8 data RAM chips to form one 32K*8 data RAM.

If we take 32k*8,then 2^15=35K,which implies 15 address lines and *8 implies 8 data lines.

Code to interface external program ROM with 8051

Let’s say we want to move data stored from locations 4000H onwards in the external ROM to the
location 40H in the internal RAM.
ORG 0000H
MOV DPTR, #4000H ; Load DPTR with the location where data is stored
MOV R0, #40H ; Load R0 with the int RAM loc where you want to save the data
rep: MOV A, #00H ; Clear accumulator
MOVC A, @A+DPTR ; Syntax to mode data from ext. ROM to accumulator
MOV @R0, A ; Copy the value of accumulator in location pointed by R0
INC R0 ; Inc R0 to point to next int RAM location
INC DPTR ; Inc DPTR to point to next ext. ROM location
CJNE A, #00H, rep ; Repeat this process until 0 is received from the DPTR
stay:SJMP stay ; Stay here
END ; Let’s say that the data present at 4000H is
ORG 4000H
DB 1H, 2H, 0AH, 0F2H, 30H, 5CH, 2AH, 01H, 00H, FFH, 0; Here 0 is the stop bit that we’re
assuming
Data Memory Space

To access the data memory space,  we use the instruction MOVX A, @DPTR. Connect the RD pin (PIN 3.7)
to the OE of data ROM and give an active low signal to the Chip enable (CE) pin of data ROM. Here we
access the data from the external ROM containing the data and transferred to internal RAM.

Circuit diagram to interface external data ROM with 8051

Code to interface external data ROM with 8051

This is an assembly language program to read 100 bytes of data from external data ROM
located at 1000H and send it to Port 1 of 8051.

ORG 0000H
MYXDATA EQU 1000H ; 1000H, location where data is stored externally
COUNT EQU 100 ; To receive all 100 bytes of data
MOV DPTR, #MYXDATA ; Move DPTR to 1000H location
MOV R0, #COUNT ; Load R0 with 100
rep: MOVX A, @DPTR ; Copy data from location pointed by DPTR to acc
MOV P1, A ; Move contents of acc to P1
INC DPTR ; Inc DPTR to next ROM location
DJNZ R0, rep ; Repeat until all 100 bytes are received
stay: SJMP stay ; Stay here forever
END
External RAM
For data

The RAM memory is called volatile memory since cutting off the power to the IC will result in the
loss of data. An improvement of the default RAM is RAWM (read and write memory), which in
contrast to ROM, to which we cannot write any data.
There are three types of RAM:
• Static RAM (SRAM)
• NV-RAM (non-volatile RAM)
• Dynamic RAM (DRAM)
We’re going to interface an SRAM chip.
• SRAM stand for static random access memory, the SRAM does not require refreshing in order to keep
the data because it is made up of flip-flops. But, the problem with the use of flip-flops for storage cell
is that each cell requires at least six transistors to build, and the cell holds only 1-bit of data
How to access data space?
• If we want to connect external data memory, i.e. SRAM, we must connect the RD (Pin 3.7) and WR
(Pin 3.6) to the SRAM data memory. In writing data to external data RAM, we use the instruction.
MOVX @DPTR, A
• We can also use NV-RAM, as it is the most efficient type of RAM whose memory remains even after
the power to the IC is cut off. First off what is NV-RAM? It stands for non-volatile RAM and is the
memory element which combines the best features of both RAM and ROM.
Features of NV-RAM:
•The read and write ability of RAM, plus the non-volatility of ROM
•Extremely power-efficient SRAM cells built out of CMOS
•Consists of an internal lithium battery as a backup energy source
•Consists of intelligent control circuitry.

Circuit diagram to interface external RAM with 8051

1.Step 1: Connect RD to OE of ext. RAM.

2.Step 2: Connect WR to WE of ext. RAM.
3.Step 3: Connect active low input of NAND gate to CE of external RAM, where the input to
NAND gate are address lines A15, A14, and A13. We’ve given 0 1 0 to these lines to access
the 8000H location of the external RAM.
Code to interface external RAM with 8051
This is an assembly language program to send 150 bytes of data or status of Port 2 to external RAM located
at 6000H.
First of all, to access 6000H of the data memory, we have to send 0 1 1 to A15 A14 A13 respectively.

ORG 0000H
RAMLOC EQU 6000H ; External RAM location = 6000H
COUNT EQU 150 ; Variable count = 150d
MOV DPTR, #RAMLOC ; Mov DPTR to point to ext. RAM location

MOV R3, #COUNT ; Number of bytes of data

rep: MOV A, P1 ; Copy status of P2 into acc
MOVX @DPTR, A ; Copy the content of acc to the ext. RAM
ACALL DELAY ; call a delay before repeating the process
INC DPTR ; Inc DPTR to point to next location
DJNZ R3, rep ; Repeat this until all the bytes of data are sent
stay: SJMP stay ; Stay here forever
END
Interfacing external program ROM, data ROM and external RAM with the 8051

Next, let’s interface both program ROM and data RAM to 8051, Let’s say we want to interface
16KB data RAM, 16KB program ROM, and 16KB of data RAM, then we’ll have to follow the
following steps:

1.Step 1: Calculate the number of address lines required to access 16KB of data, that is 2 14 =
16KB. Here, we require 14 address lines A0 – A13.
2.Step 2: Decide the location of RAM and ROM, here we are going to interface program ROM
from 0000H and data RAM from 8000H.
3.Step 3: Select the decoder circuit, here we’re going to select 74LS138 decoder.
4.Step 4: We do not need a decoder circuit for program ROM, but we have to connect the
74LS138 decoder to data ROM and data RAM.
5.Step 5: Connect G1 to VCC, G2A, and G2B to ground.
6.Step 6: Connect input A and B to P2.6 and P2.7 respectively, and the input C to ground.
7.Step 7: We connect external program and data ROM, for that we can use an AND gate with
its input being signal from RD (to access external data space) and PSEN (to access external
program space) and output to OE of external ROM.
8.Step8:To interface the external RAM, we connect
both RD and WR to WE and OE respectively of external RAM.
Interfacing ADC to 8051
ADC 0804.
• ADC0804 is an 8 bit successive approximation
analogue to digital converter from National
semiconductors.
• The features of ADC0804 are  differential
analogue voltage inputs, 0-5V input voltage
range, no zero adjustment, built in clock
generator, reference voltage can be externally
adjusted to convert smaller analogue voltage
span to 8 bit resolution etc.
The voltage at Vref/2  (pin9)  of ADC0804 can be externally adjusted  to convert smaller input voltage spans
to full 8 bit resolution. Vref/2 (pin9) left open means input voltage span is 0-5V and step size is 5/255=19.6V.
Have a look at the table below for different Vref/2 voltages and corresponding analogue  input voltage spans.

Vref/2 (pin9)  (volts) Input voltage span (volts) Step size (mV)

Left open 0–5 5/255 = 19.6

2 0–4 4/255 = 15.69

1.5 0–3 3/255 = 11.76

1.28 0 – 2.56 2.56/255 = 10.04

1.0 0–2 2/255 = 7.84

0.5 0–1 1/255 = 3.92

Steps for converting the analogue input  and reading the output from ADC0804.

•Make CS=0 and send a low to high pulse to WR pin to start the conversion.

•Now keep checking the INTR pin.  INTR will be 1 if conversion is not finished and INTR will be 0 if
conversion is finished.

•If conversion is not finished (INTR=1) , poll until it is finished.

•If conversion is finished (INTR=0), go to the next step.

•Make CS=0 and send a high to low pulse to RD pin to read the data from the ADC.
The circuit initiates the ADC to convert a given analogue input , then accepts the corresponding digital data and displays it
on the LED array connected at P0.

For example, if the analogue input voltage Vin is 5V then all LEDs will glow indicating 11111111 in binary which is the
equivalent of 255 in decimal.

AT89s51 is the microcontroller used here. Data out pins (D0 to D7) of the ADC0804 are connected to the port pins P1.0 to
P1.7 respectively.

LEDs D1 to D8 are connected to the port pins P0.0 to P0.7 respectively. Resistors R1 to R8 are current limiting resistors.
In simple words P1 of the microcontroller is the input port and P0 is the output port.

Control signals for the ADC (INTR, WR, RD and CS) are available at port pins P3.4 to P3.7 respectively.

 Resistor R9 and capacitor C1 are associated with the internal clock circuitry of the ADC.

Preset resistor R10 forms a voltage divider which can be used to apply a particular input analogue voltage to the ADC.

Push button S1, resistor R11  and capacitor C4 forms a debouncing reset mechanism.

 Crystal X1 and capacitors C2,C3 are associated with the clock circuitry of the microcontroller.
Program.

ORG 00H
MOV P1,#11111111B // initiates P1 as the input port
MAIN: CLR P3.7 // makes CS=0
SETB P3.6 // makes RD high
CLR P3.5 // makes WR low
SETB P3.5 // low to high pulse to WR for starting conversion
WAIT: JB P3.4,WAIT // polls until INTR=0
CLR P3.7 // ensures CS=0
CLR P3.6 // high to low pulse to RD for reading the data from ADC
MOV A,P1 // moves the digital data to accumulator
CPL A // complements the digital data (*see the notes)
MOV P0,A // outputs the data to P0 for the LEDs
SJMP MAIN // jumps back to the MAIN program
END

Notes.

•The entire circuit can be powered from 5V DC.

• ADC 0804 has active low outputs and the instruction CPL A  complements it to have a straight
forward display. For example, if input is 5V then the output will be 11111111 and if CPL A was not
used it would have been 00000000 which is rather awkward to see.
Interfacing DAC with 8051 Microcontroller

• The Digital to Analog converter (DAC) is a device, that is widely used

for converting digital pulses to analog signals.
• There are two methods of converting digital signals to analog signals.
These two methods are binary weighted method and R/2R ladder
method.
• In this article we will use the MC1408 (DAC0808) Digital to Analog
Converter.
• This chip uses R/2R ladder method. This method can achieve a much
higher degree of precision.
• DACs are judged by its resolution.
• The resolution is a function of the number of binary inputs. The most
common input counts are 8, 10, 12 etc.
• Number of data inputs decides the resolution of DAC. So if there are n
digital input pin, there are 2n analog levels. So 8 input DAC has 256
discrete voltage levels.
MC1408 DAC (DAC0808)

• In this chip the digital inputs are converted to current.

• The output current is known as Iout by connecting a resistor to the output to convert into
voltage.
• The total current provided by the Iout pin is basically a function of the binary numbers at
the input pins D0 - D7 (D0 is the LSB and  D7 is the MSB) of DAC0808 and the reference
current Iref.
• The following formula is showing the function of Iout

IOut=Iref⟮D72+D64+D58+D416+D332+D264+D1128+D0256 ⟯IOut=Iref ⟮D72+D64+

D58+D416+D332+D264+D1128+D0256⟯

• The Iref is the input current. This must be provided into the pin 14. Generally 2.0mA is
used as Iref
• We connect the Iout pin to the resistor to convert the current to voltage.
• But in real life it may cause inaccuracy since the input resistance of the load will also
affect the output voltage.
• So practically Iref current input is isolated by connecting it to an Op-Amp with R f = 5KΩ
as feedback resistor. The feedback resistor value can be changed as per requirement.
Generating Sinewave using DAC and 8051 Microcontroller

• For generating sinewave, at first we Angle(in sinθ Vout (Voltage Magnitude) Values sent to
θ) DAC
need a look-up table to represent the
magnitude of the sine value of angles 0 0 5 128
between 0° to 360°. 30 0.5 7.5 192
• The sine function varies from -1 to
60 0.866 9.33 238
+1.
90 1.0 10 255
• In the table only integer values are
applicable for DAC input. 120 0.866 9.33 238

• In this example we will consider 30° 150 0.5 7.5 192

increments and calculate the values 180 0 5 128
from degree to DAC input.
210 -0.5 2.5 64
• We are assuming full-scale voltage of
10V for DAC output. We can follow 240 -0.866 0.669 17

this formula to get the voltage ranges. 270 -1.0 0 0

Vout = 5V + (5 ×sinθ) 300 -0.866 0.669 17

• Let us see the lookup table according 330 -0.5 2.5 64
to the angle and other parameters for
360 0 5 128
DAC.
Interfacing 8051 with DAC 0808
ORG 0000h
mov P1,#00H
repeat: call squarwave ; generate square wave
call triwave ; generate triangular wave
call stairwave ; generate staircase wave
jmp repeat
squarwave: mov P1,#FFH
call delay2sec
mov P1,#00H
call delay2sec
Ret
triwave: mov R7,#00H
triwave1: mov P1,R7
inc R7
cjne R7,#FFH, t riwave1
mov R7,#FFH
triwave2: mov P1,R7
djnz R7,triwave2
ret
stairwave: mov P1,#00H
call delay2sec
mov P1,#20H
call delay2sec
mov P1,#40H
call delay2sec
mov P1,#80H
call delay2sec
ret
delay1sec: mov r0,#10
del2: mov r1,#250
del1: mov r2,#250
djnz r2,$
djnz r1,del1
djnz r0,del2
ret
delay2sec: mov r0,#20
del22: mov r1,#250
del21: mov r2,#250
djnz r2,$
djnz r1,del21
djnz r0,del22
ret
END
Serial Communication and Bus
Interface
UART COMMUNICATION

• In UART communication, two UARTs communicate directly with each other.

• The transmitting UART converts parallel data from a controlling device like a CPU into
serial form, transmits it in serial to the receiving UART, which then converts the serial
data back into parallel data for the receiving device.
• Only two wires are needed to transmit data between two UARTs.
• Data flows from the Tx pin of the transmitting UART to the Rx pin of the receiving
UART as follows

UARTs transmit data asynchronously, which means there is no clock signal to synchronize the
output of bits from the transmitting UART to the sampling of bits by the receiving UART. Instead of
a clock signal, the transmitting UART adds start and stop bits to the data packet being transferred.
These bits define the beginning and end of the data packet so the receiving UART knows when to
start reading the bits.
 •When the receiving UART detects a start bit, it starts to read the incoming bits at a specific frequency
known as the baud rate.
•Baud rate is a measure of the speed of data transfer, expressed in bits per second (bps). Both UARTs
must operate at about the same baud rate.
•The baud rate between the transmitting and receiving UARTs can only differ by about 10% before the
timing of bits gets too far off.
Both UARTs must be configured to transmit and receive the same data packet structure.
 HOW UART WORKS
•The UART that is going to transmit data receives the data from a data bus.
•The data bus is used to send data to the UART by another device like a CPU, memory, or
microcontroller.
•Data is transferred from the data bus to the transmitting UART in parallel form.
•After the transmitting UART gets the parallel data from the data bus, it adds a start bit, a parity bit, and
a stop bit, creating the data packet.
•Next, the data packet is output serially, bit by bit at the Tx pin.
•The receiving UART reads the data packet bit by bit at its Rx pin.
•The receiving UART then converts the data back into parallel form and removes the start bit, parity bit,
and stop bits.
•Finally, the receiving UART transfers the data packet in parallel to the data bus on the receiving end:
 UART transmitted data is organized into packets. Each packet contains 1 start bit, 5 to 9 data bits
(depending on the UART), an optional parity bit, and 1 or 2 stop bits:

START BIT
The UART data transmission line is normally held at a high voltage level when it’s not transmitting
data. To start the transfer of data, the transmitting UART pulls the transmission line from high to low for
one clock cycle. When the receiving UART detects the high to low voltage transition, it begins reading the
bits in the data frame at the frequency of the baud rate.

DATA FRAME
The data frame contains the actual data being transferred. It can be 5 bits to 9 bits long if a parity bit is
used. If no parity bit is used, the data frame can be 8 bits long. In most cases, the data is sent with the least
significant bit first.
 PARITY
•Parity describes the evenness or oddness of a number.
•The parity bit is a way for the receiving UART to tell if any data has changed during transmission.
•Bits can be changed by electromagnetic radiation, mismatched baud rates, or long distance data
transfers.
•After the receiving UART reads the data frame, it counts the number of bits with a value of 1 and
checks if the total is an even or odd number.
• If the parity bit is a 0 (even parity), the 1 bits in the data frame should total to an even number.
•If the parity bit is a 1 (odd parity), the 1 bits in the data frame should total to an odd number.
•When the parity bit matches the data, the UART knows that the transmission was free of errors.
•But if the parity bit is a 0, and the total is odd; or the parity bit is a 1, and the total is even, the UART
knows that bits in the data frame have changed.

STOP BITS
The Stop Bit, as the name suggests, marks the end of the data packet. It is usually two bits long but
often only on bit is used. In order to end the transmission, the UART maintains the data line at high voltage.
 STEPS OF UART TRANSMISSION

1.The transmitting UART receives data in parallel from 2.The transmitting UART adds the start bit, parity bit,
the data bus: and the stop bit(s) to the data frame:

3.The entire packet is sent serially from the transmitting 4.The receiving UART discards the start bit,
UART to the receiving UART. The receiving UART parity bit, and stop bit from the data frame:
samples the data line at the pre-configured baud rate:
5.The receiving UART converts the serial data back into parallel and transfers it to the data bus on the receiving end :

ADVANTAGES
•Only uses two wires
•No clock signal is necessary
•Has a parity bit to allow for error checking
•The structure of the data packet can be changed as long as both sides are set up for it
•Well documented and widely used method
DISADVANTAGES
•The size of the data frame is limited to a maximum of 9 bits
•Doesn’t support multiple slave or multiple master systems
•The baud rates of each UART must be within 10% of each other
 SPI COMMUNICATION PROTOCOL

SPI is a common communication protocol used by many different devices. For example, SD card modules, RFID
card reader modules, and 2.4 GHz wireless transmitter/receivers all use SPI to communicate with microcontrollers.
One unique benefit of SPI is the fact that data can be transferred without interruption. Any number of bits can be
sent or received in a continuous stream. With I2C and UART, data is sent in packets, limited to a specific number of bits.
Start and stop conditions define the beginning and end of each packet, so the data is interrupted during transmission.

Devices communicating via SPI are in a master-slave relationship. The master is the controlling device (usually
a microcontroller), while the slave (usually a sensor, display, or memory chip) takes instruction from the master. The
simplest configuration of SPI is a single master, single slave system, but one master can control more than one slave
(more on this below).

MOSI (Master Output/Slave Input) – Line for

the master to send data to the slave.
MISO (Master Input/Slave Output) – Line for
the slave to send data to the master
SCLK (Clock) – Line for the clock signal.
SS/CS (Slave Select/Chip Select) – Line for the
master to select which slave to send data to.
 HOW SPI WORKS

THE CLOCK
•Any communication protocol where devices share a clock signal is known as synchronous.
•SPI is a synchronous communication protocol.
• There are also asynchronous methods that don’t use a clock signal.

•The clock signal in SPI can be modified using the properties of clock polarity and clock phase.
•These two properties work together to define when the bits are output and when they are sampled.
•Clock polarity can be set by the master to allow for bits to be output and sampled on either the rising
or falling edge of the clock cycle.
• Clock phase can be set for output and sampling to occur on either the first edge or second edge of the
clock cycle, regardless of whether it is rising or falling.

SLAVE SELECT
The master can choose which slave it wants to talk to by setting the slave’s CS/SS line to a low voltage level. In
the idle, non-transmitting state, the slave select line is kept at a high voltage level. Multiple CS/SS pins may be
available on the master, which allows for multiple slaves to be wired in parallel. If only one CS/SS pin is present,
multiple slaves can be wired to the master by daisy-chaining.
MULTIPLE SLAVES
SPI can be set up to operate with a single master and a single slave, and it can be set up with multiple slaves
controlled by a single master. There are two ways to connect multiple slaves to the master. If the master has multiple
slave select pins, the slaves can be wired in parallel like this:
 If only one slave select pin is available, the slaves can be daisy-chained like this

MOSI AND MISO

The master sends data to the slave bit by bit, in
serial through the MOSI line. The slave receives the data
sent from the master at the MOSI pin. Data sent from the
master to the slave is usually sent with the most
significant bit first.
The slave can also send data back to the master
through the MISO line in serial. The data sent from the
slave back to the master is usually sent with the least
significant bit first.
STEPS OF SPI DATA TRANSMISSION
1.The master outputs the clock signal: 2.The master switches the SS/CS pin to a low
voltage state, which activates the slave:

3.The master sends the data one bit at a time to the slave 4.If a response is needed, the slave returns data one bit at
along the MOSI line. The slave reads the bits as they a time to the master along the MISO line. The master
are received: reads the bits as they are received:
ADVANTAGES AND DISADVANTAGES OF SPI
There are some advantages and disadvantages to using SPI, and if given the choice between different
communication protocols, you should know when to use SPI according to the requirements of your project:

ADVANTAGES
•No start and stop bits, so the data can be streamed continuously without interruption
•No complicated slave addressing system like I2C
•Higher data transfer rate than I2C (almost twice as fast)
•Separate MISO and MOSI lines, so data can be sent and received at the same time

DISADVANTAGES
•Uses four wires (I2C and UARTs use two)
•No acknowledgement that the data has been successfully received (I2C has this)
•No form of error checking like the parity bit in UART
•Only allows for a single master
SPI Master connected to a single slave

SPI master connected to multiple slaves

 I2C COMMUNICATION PROTOCOL
•Inter IC (i2c) (IIC) is important serial communication protocol in modern electronic systems.
•Philips invented this protocol in 1986. The objective of reducing the cost of production of television remote
control motivated Philips to invent this protocol.
•IIC is a serial bus interface, can be implemented in software, but most of the microcontrollers support IIC by
incorporating it as hard IP (Intellectual Property).
•IIC can be used to interface microcontroller with RTC, EEPROM and different variety of sensors.
•IIC is used to interface chips on motherboard, generally between a processor chip and any peripheral which
supports IIC.
•IIC is very reliable wireline communication protocol for an on board or short distances.
•I2C is a serial protocol for two-wire interface to connect low-speed devices like microcontrollers, EEPROMs, A/D
and D/A converters, I/O interfaces and other similar peripherals in embedded systems
I2C combines the best features of SPI and UARTs. With I2C, you can connect multiple slaves to a single master
(like SPI) and you can have multiple masters controlling single, or multiple slaves. This is really useful when you want to
have more than one microcontroller logging data to a single memory card or displaying text to a single LCD.

IIC protocol uses two wires for data transfer between devices: Serial Data Line (SDA) and Serial Clock Line
(SCL). The reduction in number of pins in comparison with parallel data transfer is evident. This reduces the cost of
production, package size and power consumption. IIC is also best suited protocol for battery operated devices. IIC is
also referred as two wire serial interface (TWI).
 SDA (Serial Data) – The line for
the master and slave to send and receive
data.
SCL (Serial Clock) – The line that
carries the clock signal.
I2C is a serial communication
protocol, so data is transferred bit by bit
along a single wire (the SDA line).

Like SPI, I2C is synchronous, so

the output of bits is synchronized to the
sampling of bits by a clock signal shared
between the master and the slave. The
clock signal is always controlled by the
master.
 GENERAL ELECTRICAL CHARACTERISTICS OF I2C
To implement I2C (For TIVA series microcontrollers or for most of the microcontrollers) a 4.7kilo ohm pull-up
resistor for each line is needed. This is required to implement wired-AND logic in IIC.
More than 100 devices can be connected to I2C bus theoretically. It is better to restrict to 15 devices for better
performance of the network. Each device is called as node. Nodes which generates clock are called Master nodes and
devices which work based on the clock generated by master node are called Slave nodes. Generally, master nodes initiate
and terminate the transmission. The four possible modes of operation are: master transmitter, master receiver, slave
transmitter and slave receiver.

HOW I2C WORKS

With I2C, data is transferred in messages. Messages are broken up into frames of data. Each message has an
address frame that contains the binary address of the slave, and one or more data frames that contain the data being
transmitted. The message also includes start and stop conditions, read/write bits, and ACK/NACK bits between each data
frame:
Start Condition: The SDA line switches from a high voltage level to a low voltage level before the SCL line switches from
high to low.
Stop Condition: The SDA line switches from a low voltage level to a high voltage level after the SCL line switches from
low to high.
Address Frame: A 7 or 10 bit sequence unique to each slave that identifies the slave when the master wants to talk to it.
Read/Write Bit: A single bit specifying whether the master is sending data to the slave (low voltage level) or requesting
data from it (high voltage level).
ACK/NACK Bit: Each frame in a message is followed by an acknowledge/no-acknowledge bit. If an address frame or data
frame was successfully received, an ACK bit is returned to the sender from the receiving device.
 STEPS OF I2C DATA TRANSMISSION

1.The master sends the start condition to every 2.The master sends each slave the 7 or 10 bit
connected slave by switching the SDA line from a address of the slave it wants to communicate
high voltage level to a low voltage level before with, along with the read/write bit:
switching the SCL line from high to low:
3.Each slave compares the address sent from the master to 4.The master sends or receives the
its own address. If the address matches, the slave returns data frame:
an ACK bit by pulling the SDA line low for one bit. If the
address from the master does not match the slave’s own
address, the slave leaves the SDA line high.
5.After each data frame has been transferred, 6.To stop the data transmission, the master sends a
the receiving device returns another ACK bit stop condition to the slave by switching SCL high
to the sender to acknowledge successful before switching SDA high:
receipt of the frame:
 SINGLE MASTER WITH MULTIPLE SLAVES

•Because I2C uses addressing, multiple slaves can be controlled from a single master.

•With a 7 bit address, 128 (27) unique address are available.

•Using 10 bit addresses is uncommon, but provides 1,024 (2 10) unique addresses.

•To connect multiple slaves to a single master, wire them like this, with 4.7K/10K Ohm pull-up
resistors connecting the SDA and SCL lines to Vcc:
 MULTIPLE MASTERS WITH MULTIPLE SLAVES

•Multiple masters can be connected to a single slave or multiple slaves.

•The problem with multiple masters in the same system comes when two masters try to send or
receive data at the same time over the SDA line.

•To solve this problem, each master needs to detect if the SDA line is low or high before
transmitting a message.

•If the SDA line is low, this means that another master has control of the bus, and the master
should wait to send the message.

•If the SDA line is high, then it’s safe to transmit the message.

•To connect multiple masters to multiple slaves, use the following diagram, with 4.7K Ohm pull-
up resistors connecting the SDA and SCL lines to Vcc:
ADVANTAGES AND DISADVANTAGES OF I2C
There is a lot to I2C that might make it sound complicated compared to other protocols, but
there are some good reasons why you may or may not want to use I2C to connect to a
particular device:

ADVANTAGES
•Only uses two wires
•Supports multiple masters and multiple slaves
•ACK/NACK bit gives confirmation that each frame is transferred successfully
•Hardware is less complicated than with UARTs
•Well known and widely used protocol

DISADVANTAGES
•Slower data transfer rate than SPI
•The size of the data frame is limited to 8 bits
•More complicated hardware needed to implement than SPI
 UNIVERSAL SERIAL BUS (USB)
Universal Serial Bus (USB) is a set of interface specifications for high speed wired communication
between electronics systems peripherals and devices with or without PC/computer. The USB was originally
developed in 1995 by many of the industry leading companies like Intel, Compaq, Microsoft, Digital, IBM,
and Northern Telecom.
The major goal of USB was to define an external expansion bus to add peripherals to a PC in easy
and simple manner.
USB offers users simple connectivity. It eliminates the mix of different connectors for different
devices like printers, keyboards, mice, and other peripherals. That means USB-bus allows many peripherals
to be connected using a single standardized interface socket. It supports all kinds of data, from slow mouse
inputs to digitized audio and compressed video.
USB also allows hot swapping. The "hot-swapping" means that the devices can be plugged and
unplugged without rebooting the computer or turning off the device. That means, when plugged in,
everything configures automatically. Once the user is finished, they can simply unplug the cable out; the
host will detect its absence and automatically unload the driver. This makes the USB a plug-and-play
interface between a computer and add-on devices.
USB is now the most used interface to connect devices like mouse, keyboards, PDAs, game-pads
and joysticks, scanners, digital cameras, printers, personal media players, and flash drives to personal
computers.
USB sends data in serial mode i.e. the parallel data is serialized before sends and de- serialized after
receiving.
The benefits of USB are low cost, expandability, auto-configuration, hot-plugging and outstanding
performance. It also provides power to the bus, enabling many peripherals to operate without the added
need for an AC power adapter.
 Various versions USB:

1.USB1.0: USB 1.0 is the original release of USB having the capability of transferring 12Mbps,
supporting up to 127 devices. This USB 1.0 specification model was introduced in January 1996.

2.USB1.1: USB 1.1 came out in September 1998. USB 1.1 is also known as full-speed USB.
This version is similar to the original release of USB; however, there are minor modifications for the
hardware and the specifications. USB version 1.1 supported two speeds, a full speed mode of
12Mbits/s and a low speed mode of 1.5Mbits/s.

3.USB2.0: Hewlett-Packard, Intel, LSI Corporation, Microsoft, NEC, and Philips jointly led the
initiative to develop a higher data transfer rate than the 1.1 specifications. The USB 2.0 specification
was released in April 2000 and was standardized at the end of 2001.
Supporting three speed modes (1.5, 12 and 480 Mbps), USB 2.0 supports low-bandwidth
devices such as keyboards and mice, as well as high-bandwidth ones like high-resolution Web- cams,
scanners, printers and high-capacity storage systems.
USB 2.0, also known as hi-speed USB. This hi-speed USB is capable of supporting a transfer
rate of up to 480 Mbps, compared to 12 Mbps of USB 1.1. That's about 40 times as fast! Wow!

4.USB3.0: USB 3.0 is the latest version of USB release. It is also called as Super-Speed USB
having a data transfer rate of 4.8Gbps (600 MB/s). That means it can deliver over 10x the speed of
today's Hi-Speed USB connections.
The USB 3.0 specification was released by Intel and its partners in August 2008.
Products using the 3.0 specifications are come out in 2010.
 The USB "tiered star" topology:
The USB system is made up of a host, multiple numbers of USB ports, and multiple peripheral
devices connected in a tiered-star topology.
The host is the USB system's master, and as such, controls and schedules all communications
activities. Peripherals, the devices controlled by USB, are slaves responding to commands from the
host. USB devices are linked in series through hubs. There always exists one hub known as the root
hub, which is built in to the host controller.
 USB connectors:
Connecting a USB device to a computer is very simple -- you find the USB connector on the back
of your machine and plug the USB connector into it. If it is a new device, the operating system auto-
detects it and asks for the driver disk. If the device has already been installed, the computer activates it
and starts talking to it.
The USB standard specifies two kinds of cables and connectors.

The USB standard uses "A" and "B" connectors

mainly to avoid confusion: Pin No Signal Color of the cable
•"A" connectors head "upstream" toward the 1 +5V power Red
computer. 2 - Data White / Yellow
•"B" connectors head "downstream" and connect to 3 +Data Green / Blue
4 Ground Black/Brown
individual devices.
By using different connectors on the upstream and
downstream end, it is impossible to install a cable Table: USB pin connections
incorrectly, because the two types are physically different.
USB can support 4 data transfer types or transfer modes.
1.Control
2.Isochronous
3.Bulk
4.Interrupt
Control transfers exchange configuration, setup and command information between the
device and host. The host can also send commands or query parameters with control
packets.
Isochronous transfer is used by time critical, streaming device such as speakers and video
cameras. It is time sensitive information so, within limitations, it has guaranteed access to
the USB bus.
Bulk transfer is used by devices like printers & scanners, which receives data in one big
packet.
Interrupt transfer is used by peripherals exchanging small amounts of data that need
immediate attention.

All USB data is sent serially. USB data transfer is essentially in the form of packets of data,
sent back and forth between the host and peripheral devices. Initially all packets are sent
from the host, via the root hub and possibly more hubs, to devices.
Each USB data transfer consists of a…
•Token packet (Header defining what it expects to follow)
•Optional Data Packet (Containing the payload)
•Status Packet (Used to acknowledge transactions and to provide a means of error
correction).