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Lecture-4 (8086 Memory Address Space Partition - Addressing Modes and Machine Coes) Notes

The document discusses the addressing modes of the 8086 microprocessor. It covers 7 categories of addressing data, 3 categories for addressing program codes in memory, addressing the stack, input/output ports, and implied addressing. It also discusses the instruction format and template for the 8086, which includes the opcode, operands, MOD and R/M fields to specify addressing modes and register operands. Machine codes are constructed based on the instruction template and MOD/R/M bit patterns.

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0% found this document useful (0 votes)
169 views39 pages

Lecture-4 (8086 Memory Address Space Partition - Addressing Modes and Machine Coes) Notes

The document discusses the addressing modes of the 8086 microprocessor. It covers 7 categories of addressing data, 3 categories for addressing program codes in memory, addressing the stack, input/output ports, and implied addressing. It also discusses the instruction format and template for the 8086, which includes the opcode, operands, MOD and R/M fields to specify addressing modes and register operands. Machine codes are constructed based on the instruction template and MOD/R/M bit patterns.

Uploaded by

LHK
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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8086 Addressing Modes

Dept. of Computer Science and Engineering


BRAC University
CSE 341 Team
Lecture References:
 Book:
 Microprocessors and Interfacing: Programming and Hardware,
Chapter # 2, Author: Douglas V. Hall
 The 8086/8088 Family: Design, Programming, And Interfacing,
Chapter # 2, Author: John Uffenbeck.

CSE – 341: Microprocessors


BRAC University
Addressing Mode and Categories
 The different ways in which a microprocessor can access data
are referred to as its addressing modes.
 Addressing modes of 8086 Microprocessor are categorized as:
 Addressing Data
 Addressing Program codes in memory
 Addressing Stack in memory
 Addressing I/O
 Implied addressing

CSE – 341: Microprocessors


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Things to know…
 Instruction format opcode Operand(s)

 Instructions can have 1, 2 or no operands


 INC AX ; 1 operand
 ADD CX, DX ; 2 operands CX = CX + DX
Destination source

 HLT ; no operand

 Instruction cannot have:


 SUB [DI], [1234h] ; memory locations as both operands
 MOV 1234, AX ; immediate data as destination operand

CSE – 341: Microprocessors


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1. Addressing Data
I. Immediate addressing

II. Direct addressing

III. Register [direct] addressing

IV. Register indirect addressing

V. Base-plus-index addressing

VI. Register relative addressing

VII. Base-relative-plus-index addressing

CSE – 341: Microprocessors


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1. Addressing Data
I. Immediate addressing
 Data is immediately given in the instruction

MOV BL, 11 dbh

II. Direct addressing


 Data address is directly given in the instruction

MOV BX, [437AH]

CSE – 341: Microprocessors


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1. Addressing Data
III. Register [direct] addressing
 Data is in a register (here BX register contains the data)
MOV AX, BX

MOV AL, BX
IV. Register [indirect] addressing
 Register supplies the address of the required data

MOV CX, [BX]

CSE – 341: Microprocessors


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1. Addressing Data
V. Base-plus-index addressing
 Base register is either BX or BP
 Index register is either DI or SI

MOV DX, [BX+DI]

VI. Register relative addressing


 Register can be a base (BX, BP) or an index register
(DI, SI)
 Mainly suitable to address array data

MOV AX, [BX+1000]

CSE – 341: Microprocessors


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1. Addressing Data
VII. Base-relative-plus-index addressing
 Suitable for array addressing

MOV AX, [BX+DI+10]

CSE – 341: Microprocessors


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2. Addressing Program Codes in Memory
 Used with JMP and CALL instructions
 3 distinct forms:
I. Direct

II. Indirect
III. Relative

CSE – 341: Microprocessors


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2. Addressing Program Codes in Memory
 Address is directly given in the instruction
CS IP

JMP 1000: 0000


JMP doagain ; doagain is a label in code

CALL 1000:0000
CALL doagain ; doagain is a procedure in code

 Often known as far jump or far call

CSE – 341: Microprocessors


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2. Addressing Program Codes in Memory
 Address can be obtained from
 a) any GP registers (AX,BX,CX,DX,SP,BP,DI,SI)
IP = AX ; then CS : IP
JMP AX

 b) any relative registers ([BP],[BX],[DI],[SI])


JMP [BX] IP = what is inside the physical address of DS : BX ; then CS : IP

 c) any relative register with displacement


JMP [BX + 100h]IP = what is inside the physical address of DS : BX +100h ; then CS : IP

CSE – 341: Microprocessors


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3. Addressing Stack in Memory
 PUSH and POP instructions are used to move data
to and from stack (in particular from stack
segment).
PUSH AX
POP CX

 CALL also uses the stack to hold the return address


for procedure.
CALL SUM ; SUM is a procedure name

CSE – 341: Microprocessors


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4. Addressing Input and Output Port
 IN and OUT instructions are used to address I/O ports

 Could be direct addressing

IN AL, 05h ; Here 05h is a input port number

 or indirect addressing
OUT DX, AL ; DX contains the address of I/O port

 Only DX register can be used to point a I/O port

CSE – 341: Microprocessors


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5. Implied Addressing
 No explicit address is given with the instruction
 implied within the instruction itself
 Examples:

CLC ; clear carry flag

HLT ; halts the program

RET ; return to DOS

CSE – 341: Microprocessors


BRAC University
8086 Machine Codes
Dept. of Computer Science and Engineering
BRAC University
CSE 341 Team
Instruction template
 For 8085: Just look up the hex code for each instruction.
 For 8086 it is not simple.
 E.g 32 ways to specify the source in MOV CX, source.
 MOV CX, source
a 16-bit register (8 in number)

a memory location (24 possible memory addressing modes)

 Each of these 32 instructions require different binary code.


 Impractical to list them all in a table.
 Instruction templates help code the instruction properly.

CSE – 341: Microprocessors


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Instruction template (6 bytes)
BYTE 1 BYTE 2

OPCODE D W MOD REG R/M

BYTE 3 BYTE 4

LOW BYTE DISPLACEMENT / DATA HIGH BYTE DISPLACEMENT / DATA

BYTE 5 BYTE 6

LOW BYTE of IMMEDIATE DATA HIGH BYTE of IMMEDIATE DATA

An instruction after conversion can have 1 to 6 bytes long of machine code

CSE – 341: Microprocessors


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Constructing Machine Codes for 8086
 Each instruction in 8086 is associated with the binary
code.
 You need to locate the codes appropriately.
 Most of the time this work will be done by assembler
 The things needed to keep in mind is:
 Instruction templates and coding formats
 MOD and R/M Bit patterns for particular instruction

CSE – 341: Microprocessors


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MOV Instruction Coding
 MOV data from a register to a register/to a memory location or
from a memory location to a register.
(Operation Code of MOV: 100010)

CSE – 341: Microprocessors


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MOD and R/M Field
 2-bit Mode (MOD) and 3-bit Register/Memory (R/M)
fields specify the other operand.
 Also specify the addressing mode.

CSE – 341: Microprocessors


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MOD and R/M Field
 If the other operand in the instruction is also one of the eight register then put in 11
for MOD bits in the instruction code.

 If the other operand is memory location, there are 24 ways of specifying how the
execution unit should compute the effective address of the operand in the main
memory.

 If the effective address specified in the instruction contains displacement less than
256 along with the reference to the contents of the register then put in 01 as the
MOD bits.

 If the expression for the effective address contains a displacement which is too
large to fit in 8 bits then out in 10 in MOD bits.
CSE – 341: Microprocessors
BRAC University
REG Field
 REG field is used to identify the register of the one operand

CSE – 341: Microprocessors


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Instruction template
BYTE 1 BYTE 2

6 bits of
MOV, ADD etc OPCODE D W MOD REG R/M

D - direction
If D=0, then direction is from a register (source)
If D=1, then direction is to a register (destination)

W - word
If W=0, then only a byte is being transferred (8 bits)
If W=1, them a whole word is being transferred (16 bits)

MODE OPERAND NATURE


• 34h here is an 8-bit displacement
00 Memory with no displacement MOV AX, [BX]
• [BX+34h] is a memory/offset address
01 Memory with 8-bit displacement MOV AX, [BX + 12h]
10 Memory with 16-bit displacement
MOV [BX + 34h ], AL MOV AX, [BX + 1234h]
11 Both are registers MOV AX, BX

MOV AX, 1234 h


• 1234h here is a 16-bit immediate data value

CSE – 341: Microprocessors


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Instruction template
BYTE 1 BYTE 2

OPCODE D W MOD REG R/M

• Value for R/M with corresponding MOD


value
• Value for REG with corresponding W Check column that matches with MOD
value and the register considered in D value

CSE – 341: Microprocessors


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Example 1
 MOV 8B43H [SI], DH: Copy a byte from DH to memory with
16 bit displacement given the opcode for MOV=100010
BYTE 1 BYTE 2

1 0 0 0 1 0 0 0 1 0
OPCODE D W MOD REG R/M

Therefore D=0
MODE OPERAND NATURE
source-- 8 bits (not a word size) 00 Memory with no displacement
MOV [SI + 8B43H] , DH Therefore W=0 01 Memory with 8-bit displacement
10 Memory with 16-bit displacement
11 Both are registers

BYTE 3 BYTE 4

LOW BYTE DISPLACEMENT / DATA HIGH BYTE DISPLACEMENT / DATA

CSE – 341: Microprocessors


BRAC University
Example 1
 MOV 8B43H [SI], DH: Copy a byte from DH to memory with
16 bit displacement given the opcode for MOV=100010
BYTE 1 BYTE 2

1 0 0 0 1 0 0 0 1 0 1 1 0
OPCODE D W MOD REG R/M

MOV [SI + 8B43H] , DH

CSE – 341: Microprocessors


BRAC University
Example 1
 MOV 8B43H [SI], DH: Copy a byte from DH to memory with
16 bit displacement given the opcode for MOV=100010
BYTE 1 BYTE 2

1 0 0 0 1 0 0 0 1 0 1 1 0 1 0 0
OPCODE D W MOD REG R/M

MOV [SI + 8B43H] , DH

CSE – 341: Microprocessors


BRAC University
Example 1
 MOV 8B43H [SI], DH: Copy a byte from DH to memory with
16 bit displacement given the opcode for MOV=100010
BYTE 1 BYTE 2

1 0 0 0 1 0 0 0 1 0 1 1 0 1 0 0
OPCODE D W MOD REG R/M

MOV [SI + 8B43H] , DH

BYTE 3 BYTE 4

0 1 0 0 0 0 1 1 1 0 0 0 1 0 1 1
LOW BYTE DISPLACEMENT HIGH BYTE DISPLACEMENT

Machine Code: 1000 1000 1011 0100 0100 0011 1000 10112 or 88 B4 43 8B16
CSE – 341: Microprocessors
BRAC University
Example 2
 MOV AX, BX: given the opcode for MOV=100010

BYTE 1 BYTE 2

1 0 0 0 1 0 1 1 1 1
OPCODE D W MOD REG R/M

AX considered which is a
destination operand,
therefore D = 0

destination-- 16 bits (a word size)


MODE OPERAND NATURE
AX is 16-bit long, 00 Memory with no displacement
MOV AX, BX therefore W = 1
01 Memory with 8-bit displacement
10 Memory with 16-bit displacement
11 Both are registers

CSE – 341: Microprocessors


BRAC University
Example 2
 MOV AX, BX: given the opcode for MOV=100010
BYTE 1 BYTE 2

1 0 0 0 1 0 1 1 1 1 0 0 0
OPCODE D W MOD REG R/M

CSE – 341: Microprocessors


BRAC University
Example 2 Machine Code: 1000 1011 1100 00112 or 8B C316
 MOV AX, BX: given the opcode for MOV=100010

BYTE 1 BYTE 2

1 0 0 0 1 0 1 1 1 1 0 0 0 0 1 1
OPCODE D W MOD REG R/M

CSE – 341: Microprocessors


BRAC University
QUIZ
Compute the machine code for the following using the table below
and the opcode for MOV as100010

a) MOV AX, 5E9Ch b) MOV DH, [BP+SI+7Dh]

CSE – 341: Microprocessors


BRAC University
Instruction Template
 The Intel literature shows two different formats for coding
8086 instructions.
 Instruction templates helps you to code the instruction
properly.
 Example:
IN AL, 05H

CSE – 341: Microprocessors


BRAC University
Example

CSE – 341: Microprocessors


BRAC University
Example
 MOV 43H [SI], DH: Copy a byte from DH register to
memory location.

CSE – 341: Microprocessors


BRAC University
Example 3
 MOV CX, [437AH]: Copy the contents of the two memory
locations to the register CX.

CSE – 341: Microprocessors


BRAC University
QUIZ
Compute the machine code for the following using the table below
and the opcode for MOV as100010

a) MOV AX, 5E9Ch b) MOV DH, [BP+SI+7Dh]

CSE – 341: Microprocessors


BRAC University
Thank You !!!

CSE – 341: Microprocessors


BRAC University

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