Microprocessor Based Systems and

Assembly Language Programming

CEN311 (Spring 2011) – Lecture 1

Introduction to Microprocessor

Dr. Husain Parvez

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 Presentation Credit
• “The 8086 & 8088 Microprocessors” by A.K. Gautam, A.R.
Jaiswal
• “Assembly Language Programming” by Belal Hashmi, NU-
FAST, VU, Lahore

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About the Course

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Course Outline
1. Introduction to Microprocessors

2. Addressing Modes

3. Data Movement Instructions

4. Arithmetic and Logic Instructions

5. Program Control Instructions

6. Buses and Interfacing

7. Memory and Interfacing

8. I/O Operations and Interfacing

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Course Outline
9. Programming the Microprocessor

10. Memory Interface

11. Basic I/O Interface

12. Basic I/O Interface

13. Basic Interrupts

14. Microcontroller

15. Developing Microprocessor based products

16. Design Examples

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 What is Assembly Language?
• What are High-level Languages?
• Designed to be programmer friendly.
• Create distance between programmer and hardware.

• This distance is covered through translators, i.e.

compilers and interpreters.
• Examples of High-level language are C, C++, Java, etc

• Assembly language talks directly with hardware.

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Course objectives
• After successful completion of this course, you will be
able to
• Explain all basic operations of a computer
• Understand the psychology of computer
• (After seeing from so close) understand the limitations
and capabilities of a computer
• Your programming logic will become fine-grained. This
is the major objective.

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Why to learn Assembly Language?
• Why to learn Assembly language when there exist easy
to use High-Level Languages (HLL)?
• HLLs use translators; translators are not accurate.
• When Japanese is translated to English, a word may be
replaced by a sentence.
• Translator destroy beauty of language.
• Similarly, compilers produce lot of garbage code.
• In normal programs, extra garbage code can be acceptable.

• In some situations, extra garbage code can cause

inefficiencies.

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Why to learn Assembly Language?
• Example:
 Each pixel contains 3 colors (RGB)
 Consider a single video frame sized 800x640 pixels
 A video generally contains 30 frames per second
 Video compression/decompression algorithms deals
with pixels.
 Few extra garbage instructions at pixel-level can cause
hours of extra processing time.

• Not entire code written using Assembly.

• Only time-critical portions written in assembly
language to gain few extra cycles.

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Why to learn Assembly Language?
• Assembly language also used for real-time systems.
• Real-time systems require time-bound response.
• Assembly language gives full control over instructions
being executed.
• For HLLs we cannot tell how many instructions are used.

• To produce fine-grained logic in students.

• A “for” loop in HLLs has many tasks hidden in assembly

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Introduction to Assembly
Language

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Basic Computer Architecture
• A computer system contains three basic components.
• Processor performs operations on data stored in memory.

• Just like a processor, memory is also a dumb device.

Processor Memory

Peripherals
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Basic Computer Architecture
• There need to be a mechanism to tell memory that
 Processor wants to read data from memory, or write to it
 Which data processor wants to read.
 How to transfer this data from memory to processor

Processor Memory

Peripherals
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Basic Computer Architecture
• Address bus: Group of bits that processor uses to inform
memory about which element to read or write to memory.

• Data bus: Group of bits that moves data from memory to

processor or from processor to memory.
• Control bus: Group of bits that informs memory if data is
read from memory or written to memory.

Processor Memory

Peripherals
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Basic Computer Architecture
• A processor uses address, data and control buses in a
synchronous fashion to perform a meaningful operation.
• A programmer specifies this meaningful operation

• Address bus: is uni-directional (from processor to mem)

• Data bus: is bi-directional.
• Control bus: is bi-directional

Processor Memory

Peripherals
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 Basic Computer Architecture
• Suppose, memory contains 2000 different cells.
• The binary number represented by address bus tells that
which memory cell we want to read from or write to.
• Each memory cell is n-bit wide.
• n-bit data is transferred from/to processor on data bus.

address
data
Processor Memory
control

Peripherals
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Registers
• A computer performs operations on operands.
• Suppose we want to perform an addition operation on
two operands placed in memory.
• We have only one data bus, and one address bus.
• One operand can be accessed from memory at a time.
• How to perform an operation with two operands?
• Temporary storage in a processor stores operands.
address
data
Processor Memory
control

Peripherals
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Registers
• This temporary storage inside a processor are called as
registers.
• Registers are just like normal memory cells.
• Each register has a precise location.
• Registers remember what is stored in them.
• Registers are very scarce and precious resource.
• They are relatively very less in number as compared to
memory cells.
• Different registers are named by their unique names.
• Some manufactures name them as r1, r2, r3 ….
• Others name them as A, B, C….
• Some name them according to their functionality like index
register, etc
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Accumulator Register
• This is a central register in every processor.
• Traditionally all mathematical and logical operations are
performed on the accumulator.
• The word size of a processor is generally defined by the
width of its accumulator.

• A 32-bit processor has a 32-bit accumulator.

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Pointer/Index or Base Register
• The name of this register varies from manufacturer to
manufacturer.
• This register does not hold data; it holds address of data.
• The need for this register can be understood by examining a
“for” loop in higher level language.

• Index register stores the address of an array of data.

• In newer architectures, generic registers can perform the

task of accumulator and index registers both.

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Flag Register or Program Status Word
• This register is meaningless as a single unit.
• Individual bits of this register carry different meanings.

Example:
• An example of a bit present in this register is a
“carry flag”.
• A 16-bit number added to a 16-bit accumulator gives result in
17 bits.
• The 17th bit is stored in the “carry flag”.
• Without the 17th bit, the result of two 16-bit additions is
incomplete.
• More examples will be given later in detail.
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 Program Counter or Instruction Pointer
• A processor understands only binary language.
• Even the instructions must be translated to binary format
• All the instructions in High Level Languages are represented
as binary numbers at Assembly Level.
• These instructions can comprise of Multiplication, Addition,
etc, or Encapsulation, Inheritance, etc

• A Program is an ordered set of instructions.

• Instructions are executed one after another; 1 st, 2nd, 3rd..
• The order of instructions is very important
• The processor ensures that the instructions are executed in
the right order.
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 Program Counter or Instruction Pointer
• A special register ensures the ordering of instructions.
• This register is called as the Program Counter or Instruction
Pointer.
• The Program Counter holds the address of the next
instruction to be executed.
• The memory address pointed by the Program Counter
consists of a binary number, say 0xEA, 255, or 152.
• For a processor, the number 152 might be an add operation.

• This one number tells the processor that it has to add, where
its operands are, and where to store the result.

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 Program Counter or Instruction Pointer
• The number representing an instruction is called as an
opcode.
• The instruction pointer moves from one opcode to another.

• An instruction is fetched, its operands are read, and the

instruction is executed. The process continues….
• Remembering an opcode (say 152 for add, 153 for subtract
etc) is very difficult.
• To make things easier, symbols are attached to each opcode.
Like the symbol “add” instead of 152…
• An Assembler then simply performs a replace operation i.e.
replacing symbols by numbers.
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Instruction Groups
• Usual opcodes in every processor exist for moving data,
arithmetic operations, logical manipulations, etc.
• Grouping of instructions makes learning a new processor
quick and easy.

• Few of the major group of instructions are

• Data Movement Instructions
• Arithmetic and Logic Instructions
• Program Control Instructions
• Special Instructions

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 Data Movement Instructions
• These instructions are used to move data from one place to
another.
• These places can be registers, memory, or even peripheral
devices.

• Some examples are

mov ax, bx
lad 1234

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 Arithmetic and Logic Instructions
• Arithmetic Instructions consists instruction like
• Addition, Subtraction, Multiplication, Division, etc

• Logical Instructions consists instruction like

• Logical and, logical or, logical xor, Complement, etc

• Some examples are

and ax, 1234
add bx, 0534
add bx, [1234]

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 Program Control Instructions
• These instructions control program execution and flow
• We know that Instruction pointer consists of next instruction
to be executed.
• The instructions are placed in an order.
• Sometimes, we don’t want to follow a particular order.
• The Instruction pointer can be modified to change the flow of
program execution.
• So, the program control instruction control the program flow
by manipulating the Instruction Pointer.
• Some examples are
cmp ax, 0
jne 1234
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 Special Instructions
• These instructions have some special functionaliy
• These are rarely used, but are important

• Some examples are

cli ; clear interrupt flag
sti ; set interrupt flag

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Intel IAPX88 Architecture

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 Why IAPX88?
• Wide availability
• Free assemblers and debuggers
• Wide use in variety of applications

• Concepts used here can be applicable to other architectures.

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 What is iAPX88 Architecture?
• iAPX88 stands for “Intel Advanced Processor Extensions
88”.
• Also called at 8088 architecture.
• Used in very first IBM PC machine.
• We will study 8088, and 80386 architectures.

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 What is iAPX88 Architecture?
• 8088 is a 16-bit processor
• Accumulator and registers are 16-bit wide

• 80386 is a 32-bit processor

• 80386 is downward/backward compatible with 8088
• All code written for 8088 is valid for 80386

• Why backward compatibility required? Drawbacks?

• Architecture of a processor generally means

• Organization and functionalities of registers
• Instruction set of processors

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History
• Intel released few 4-bit processors.
• 8080, an 8-bit processor, was first successful processor
• Popular due to simplistic design, versatile architecture
• Later, Intel launched 8085 architecture…
• 8088, first 16-bit architecture
• 8085 allowed maximum 65K memory
• 8088 allowed maximum 1MB memory
• IBM embedded 8088 in their PC. It ran on 4.43 MHz.

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 Register Architecture
• iAPX88 architecture consists of 14 registers

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL DX

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 General Registers (AX, BX, CX, DX)
• AX, BX, CX, DX behave as general purpose registers
• These registers also perform some special functions
• X means extended, i.e. they are 16-bit registers
• For example
• AX refers to 16-bit register
• Lower and upper 8-bit accessed through AH, AL
• AH means A High byte, AL means A Low byte
• Change in AH or AL is reflected on AX.
CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 General Registers (AX, BX, CX, DX)
• A of AX stands for Accumulator
• All general purpose registers can act as accumulator
• Some particular functions only related to AX
• B of BX stands for Base
• Because of its role in memory addressing
• C of CX stands for Counter
• Certain instructions work with automatic count
• D of DX stands for Destination
• It acts as destination in some I/O operations
CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Index Registers (SI, DI)
• SI stands for Source Index
• DI stands for Destination Index
• These are index registers of Intel architecture
• They are used as source and destination in special class of
instructions, called as String Instructions.
• Mathematical and logical instructions are also allowed on
Index Registers.
• SI, DI are 16-bit; cannot be used as 8-bit register pairs
CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Instruction Pointer (IP)
• Contains the address of next instruction to be executed
• No mathematical or memory operations done through IP
• It is out of our direct use; automatically used
• Program control instructions change IP register

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Stack Pointer (SP)
• Points to memory
• Indirectly used by a set of stack related instructions
• Will be discussed later with system stack.

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Base Pointer (BP)
• Points to memory
• Indirectly used by a set of stack related instructions
• Will be discussed later with system stack.

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Flags Register
• Not meaningful as a unit.
• It is bit wise significant
• Accordingly, each bit is named separately.
• Bits not named are unused

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Flags Register – Carry
• C for Carry
• 16 bit + 16 bit generates 17 bit result
• 8 bit + 8 bit generates 9 bit result
• Extra 1 bit of result is stored in Carry bit of flag register

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Flags Register – Parity
• P for Parity
• Parity is the number of 1s in a binary number
• Parity can be either odd or even
• For example 1000010000000010 has odd parity

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP
DS BP • Parity is generally used to verify the
SS SI
integrity of a number during
ES DI
AH AL AX
communication.
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Flags Register – Auxiliary Carry
• A for Auxiliary Carry
• Numbers in base 16 are called as Hexa numbers
• A single hexa digit can be represented in 4 bits
• 4 bits are also called as nibble

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP • During addition or subtraction,

DS BP
when a carry goes from one nibble
SS SI
ES DI
to another, this flag is set
AH AL AX • C is set if there is a carry from
IP BH BL BX
CH CL CX whole addition
FLAGS DH DL
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DX
 Flags Register – Zero
• Z for Zero flag
• If the last mathematical or logical instruction has generated a
zero in its destination.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Flags Register – Sign
• S for Sign flag
• A signed number is represented in the form of 2’s
complement
• MSB of a -ve number is 1, and 0 for a +ve number

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP • The sign bit of the last

DS BP
mathematical or logical operation is
SS SI
ES DI
stored in the sign flag.
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Flags Register – Trap
• T for Trap flag
• Special role in debugging
• Will be discussed later in detail

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Flags Register – Interrupt
• I for Interrupt flag
• It tells if the processor can be interrupted from outside
• Programmer can set or reset this bit using special instructions

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP • Sometimes programmer does not

DS BP
want to have interrupts in his
SS SI
ES DI
particular piece of code.
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Flags Register – Direction
• D for Direction flag
• Specially related to string instructions
• Bottom to top as D=0, and top to bottom as D=1

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP • Whether the current operation

DS BP
performed from bottom to top, or
SS SI
ES DI
top to bottom
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Flags Register – Overflow
• O for Overflow flag
• Sets when carry into the MSB is different from carry out of
MSB.

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
O D I T S Z A P C

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
 Segment Registers (CS, DS, SS, ES)
• CS for Code Segment Register
• DS for Data Segment Register
• SS for Stack Segment Register
• ES for Extra Segment Register
• These are special registers for Intel segmented memory
model; Discussed later…

CS SP
DS BP
SS SI
ES DI
AH AL AX
IP BH BL BX
CH CL CX
FLAGS DH DL
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DX
First Assembly Language
Program

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Pseudocode for adding 3 numbers
move 5 to ax
move 10 to bx
add bx to ax
move 15 to bx
add bx to ax

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 Assembly Language for addition
ex01.asm

• We need assembler to assemble this program

• We will use “Netwide Assembler” or NASM
• NASM is a free and opensource assembler
• We will also use AFD, “A Fullscreen debugger”
 Assembly Language for addition
• To assemble the program, give the following command
> nasm ex01.asm -o ex01.com -l ex01.lst
Assembly Language Listing file
ex01.lst

Machine code of corresponding instruction

Offset of each instruction
Line number as found in the assembly language program
 Assembly Language Listing file
B8 is the opcode for inst that moves constant to AX
0500 constant directly embedded in instruction

• In little-endian format 16-bit constant 0005 is stored as 05 00

• In little-endian format, bytes are stored from LSB to MSB
• In big-endian, bytes are stored from MSB to LSB, i.e. 00 05
 Assembly Language Listing file
B8 is the opcode for inst that moves constant to AX
0500 constant directly embedded in instruction

• Intel uses little-endian format, Motorolla uses big-endian format

• Big-endian have an argument that it is easy to understand
• Little-endian have an argument that it places lesser significant
number on lesser address, and more significant on more
significant address.
 Assembly Language Listing file

• BB is the opcode of instruction that moves constant to BX

• The last instruction (comprising 2 bytes) is placed at offset 0x10
• Thus the size of COM file is 16+2 bytes = 18 bytes
• Size of COM file can be verified from directory

COM file in hexa editor

 Debugging Assembly Program
• To debug the program, give the following command
> afd ex01.com Start address due to org directive
Debugger showing assembly; HOW? COM file had no assembly
 Step by Step Execution
• Press F2 for step by step execution
Segmented Memory Model

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 Segmented Memory Model
• Earlier processors (8080, 8085) used linear memory model
• Linear Memory Model can access 64K memory using 16-bit
wide address bus
• Designers of 8088 wanted to access more than 64K memory;
but wanted to remain compatible with 8080/8085
• Thus, segmented memory model was introduced.

• Our programs generally consists of three distinct portions;

code, data and stack
• Distinct representation of three logical portions is not possible
through linear memory model.
• Segmented memory model is suitable to represent these logical
portions as distinct memory units.
 Segmented Memory Model
• The iAPX88 architecture can access 1MB of memory through 20
bits.
• This 1MB of memory can have multiple windows of 64K.
• The four segment registers are used to hold the start address of
each memory window.
• Four memory windows can exist at a time.
• Each window has fixed size of 64K.
• CS holds the start address of code memory.
• DS holds the start address of data memory.
• SS holds the start address of stack memory.
• ES holds the start address of extra memory.
• ES (Extra Segment) can be used as an extra data window. It has
special role for string instructions.
• ES cannot be used as extra code or stack segment
 Segmented Memory Model
• The segment register tells the start location of a window, that
can be opened anywhere in the 1MB memory.
• An offset is required to access memory in each window.
• Offset and base registers, both, are required to access memory.

• Offset is added to base address to get memory location

• For that purpose following registers can contain a 16-bit offset

• IP, SP, BP, SI, DI and BX

Segmented Memory Model
 Physical Address Calculation
• As previously described, we require base and offset to access
memory.
• Base can be CS, DS, SS, ES
• Offset can be IP, SP, BP, SI, DI and BX
• However, the base and offset addresses are 16-bit wide.
• How to access 20-bit memory from 16-bit registers?

• For that purpose following registers can contain a 16-bit offset

• IP, SP, BP, SI, DI and BX

 Physical Address Calculation

• The carry if generated through this addition is dropped.

• The memory is accessed through segment + offset pair.
 Overlapping Segments
• The base and offset addresses can be selected in such a way
that multiple segments overlap.