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Interrupts (Peripheral - Computer Connections)

This document discusses two methods for handling priority interrupts from multiple devices: serial/daisy chain and parallel. [1] In the serial method, devices are arranged in order of priority and pass the interrupt signal along until the highest priority interrupting device is identified. [2] The parallel method uses an interrupt register with bits corresponding to each device's priority, and a mask register allows disabling lower priority interrupts. [3] Both methods assign a vector address to identify the highest priority interrupting device to the CPU.
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0% found this document useful (0 votes)
58 views

Interrupts (Peripheral - Computer Connections)

This document discusses two methods for handling priority interrupts from multiple devices: serial/daisy chain and parallel. [1] In the serial method, devices are arranged in order of priority and pass the interrupt signal along until the highest priority interrupting device is identified. [2] The parallel method uses an interrupt register with bits corresponding to each device's priority, and a mask register allows disabling lower priority interrupts. [3] Both methods assign a vector address to identify the highest priority interrupting device to the CPU.
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Interrupt-Initiated I/O

Lec Tarannum Zaki


Dept. of CSE
MIST
Priority Interrupt

 When interrupt is generated from multiple devices, it is required for the CPU to
determine which interrupt to respond first. There are 2 ways deal with the
interrupts:

 Serial or daisy chaining priority interrupt


 Parallel priority interrupt

 Each device is assigned with a vector address (VAD) by a priority interrupt unit
which indicates the priority level of a particular device.

 Priority is defined by the speed of a device; a low speed device has low priority
(e.g. keyboard) and a high speed device has high priority (e.g. disk drive).
 A high priority device must be serviced first than a low priority device.
Priority Interrupt: Serial or Daisy Chain

 Device with highest priority is placed first.


 Device that wants the attention send the interrupt request to the CPU.
 CPU then sends the INTACK signal which is applied to PI(priority in) of the first
device.
 Interrupts for devices are ORed to indicate CPU that an interrupt has occurred.
 If it had requested the attention, it place its VAD(vector address) on the bus. And it
blocks the signal by placing 0 in PO(priority out)
 If not, it passes the signal to next device through PO(priority out) by placing 1.
 This process is continued until appropriate device is found.
 The device whose PI is 1 and PO is 0 is the device that send the interrupt request.
Priority Interrupt: Serial or Daisy Chain
Priority Interrupt: Serial or Daisy Chain
Priority Interrupt: Parallel

 It consist of interrupt register whose bits are set separately by the interrupting
devices.
 Priority is established according to the position of the bits in the register.
 Mask register is used to provide facility for the higher priority devices to interrupt
when lower priority device is being serviced or disable all lower priority devices
when higher is being serviced.
 Corresponding interrupt bit and mask bit are ANDed and applied to priority
encoder.
 Interrupts for devices are ORed to indicate CPU that an interrupt has occurred.
Priority Interrupt: Parallel
Priority Interrupt: Parallel
THANK YOU

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