Memory Management and Virtual Memory
Memory Management and Virtual Memory
Virtual Memory
Fred Kuhns
([email protected], http://www.arl.wustl.edu/~fredk)
Applied Research Laboratory
Department of Computer Science and Engineering
Washington University in St. Louis
Washington
WASHINGTON UNIVERSITY IN ST LOUIS
Memory Management
• Central Component of any operating system
• Hierarchical layering
– registers
– cache
– primary (main) memory
– secondary (backing store, local disk) memory
– file servers (networked storage)
• Policies related to memory requirements of processes
(i.e. all or part resident)
– goals of admitting new processes (long term), memory
allocation (medium term) and processor scheduling (short
term) must be considered together.
– Common goal is to optimize the number of runnable process
resident in memory
proc struct
0xffffffff
Kernel stack
0x7fffffff
stack
Data
Page-level
allocator
CPU
Unitialized data
DRAM Stack and heap
Low Address
(0x00000000) Text (shared) Allocated virtual pages
Initialized Data
app1 Unitialized Data Swap
Address space Heap (Dynamic) Disk
UFS
High Address stack (dynamic)
(0x7fffffff) Environment
Text and
initialized data app1
• Virtual address:
– virtual page number + offset
• Finds PTE for virtual page
• Extract physical page and adds offset
• Fail (MMU raises an exception - page fault):
– bounds error - outside address range
– validation error - non-resident page
– protection error - not permitted access
CPU
virtual
address
cache MMU
data Physical
address
Global memory
MMU
CPU Virtual
address TLB
physical
cache
address
context table pointer
context
Page tables
C -1
Block Length
(k words)
(b) Cache
Block
2n - 1
Word Length
(a) Main Memory
Fred Kuhns (12/08/21) CS523 – Operating Systems 30
Page Table Entry
X bits Y bits
Virtual address virtual page number offset in page
Frame X
X offset
add
PTE
M R control bits frame number
PTD Level 1
Level 2
PTD Level 2
Context register PTD
12 bit PTE
• 12 bit index for 4096 entries • Virtual page number has 20 bits for 1M pages
• 8 bit index for 256 entries • Physical frame number has 24 bits with a 12 bit offset,
• 6 bit index for 64 entries permitting 16M frames.
Fred Kuhns (12/08/21) CS523 – Operating Systems 33
Page Table Descriptor/Entry
Page Table Descriptor
process process
mmap(): Address space
read/write: Copy Copy
Virtual Memory System Buffer Cache
P1 pages
Copy Copy
Persistent storage
struct segvn_data {}
struct as { struct seg {
segment list base
hint size}
data
struct hat {}}