0% found this document useful (0 votes)
106 views53 pages

Lecture 13

Interrupts are events that cause the processor to suspend its current activities and execute an interrupt handler. There are two types - software interrupts triggered by instructions, and hardware interrupts from devices. The interrupt vector table stores the addresses of interrupt service routines. Upon an interrupt, the processor loads the address from the vector table and jumps to the interrupt handler.

Uploaded by

Areeb Saqib Butt
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
106 views53 pages

Lecture 13

Interrupts are events that cause the processor to suspend its current activities and execute an interrupt handler. There are two types - software interrupts triggered by instructions, and hardware interrupts from devices. The interrupt vector table stores the addresses of interrupt service routines. Upon an interrupt, the processor loads the address from the vector table and jumps to the interrupt handler.

Uploaded by

Areeb Saqib Butt
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 53

Interrupts

Interrupts
• Interrupts are events that occurred outside the processor and the
processor must be informed about them.

• Interrupts are asynchronous and unpredictable

• The processor responds to interrupt by suspending its current


activities, saving its state, and executing a function called an interrupt
handler (or an interrupt service routine, ISR) to deal with the event.
Execution of Interrupts

• An interrupt handler or ISR may be executed in one of two ways:


1. An application program containing an INT instruction could cause a call to
the routine, which is called a software interrupt

2. A hardware interrupt occurs when a hardware device (asynchronous port,


keyboard, timer, and so on) sends a signal to the Programmable Interrupt
Controller chip.

• This makes software and hardware two different types of interrupts


Where is ISR located?
• Lets look at memory organization as shown in figure

• At physical location 00000 there is interrupt vector


table (IVT)

• IVT contains the physical address of ISR of each


interrupt in form of segment: offset pair

• IVT is like a table of content for interrupts.

• If you look at IVT in AFD you can see that some ISR
are in ROM BIOS some are in DOS Kernel

• Next slide gives more details of IVT


Interrupt Vector Table (IVT)
• IVT is Located in Memory from 0000:0000 to 0000:1024 Int 0 offset segment
Int 1 offset segment
• Each entry in table is of 4 bytes (i.e 4 bytes per row)
Int 2 offset segment
• One row per interrupt Int 3 offset segment

• First two byte in row are offset of ISR …..


Int FF offset segment
• 3rd and 4th byte are segment address of ISR
Interrupt vector table
• Segment of nth Interrupt is at n*4th byte in IVT

• Offset of nth interrupt is at n*4+2 byte in IVT

• The actual addresses in this table vary from one machine to another
INT Instruction
• Interrupt are invoked using INT instruction
• The INT (call to interrupt procedure) instruction calls a ISR
• The syntax is
• INT <number>
• where number is an integer in the range 0 to FF hexadecimal

• Parameters are passed to int in register, not on stack. Output is also returned in registers
• For example
• Mov ax, 0x4C00
• Int 21h

• Hardware interrupts are invoked implicitly, some software interrupts are invoked implicitly (eg int 0) and some are invoked
explicitly (e.g. int 21h). So you will never write int 0 in your code
IRET
• Like ret is paired with call to return from subroutine, IRET (interrupt
ret) is paired with INT to return from ISR
Interrupt Vectoring
• The CPU processes the INT instruction using the interrupt vector table

• Steps taken by the CPU when the INT n instruction is invoked by a program:
1. The operand of the INT instruction is multiplied by 4 to locate the matching interrupt vector table entry.

2. The CPU pushes the flags and a current CS and IP (return address) on the stack and disables hardware
interrupts (by clearing interrupt flag and trap flag )

3. The CPU Loads segment of interrupt n (n*4 )from IVT to CS and Offset to IP (n*4+2)

4. The interrupt handler at new segment and offset executes until it reaches an IRET (interrupt return) instruction

5. The IRET instruction pops the flags and the return address off the stack, causing the processor to resume
execution immediately following the INT n instruction in the calling program.
The operation of INT can be written as:
1. Pushf ; push flag
2. cli
3. clt
4. Push cs
5. Push ip
6. ip = [0:N*4]
7. cs = [0:N*4+2]
The operation of IRET can be written as:
1. pop ip
2. Pop cs
3. Popf ;pop flag
SOFTWARE INTERRUPTS
Software Interrupts
• A software interrupt is requested by the processor itself upon executing particular instructions or when certain
conditions are met. (they do not exactly fit the definition of interrupts given in slide 2 )

• Every software interrupt signal is associated with a particular interrupt handler (or ISR).

• Most of these interrupt handlers, provide input–output capability to application programs

• They are used for such tasks as the following:


• Displaying characters and strings
• Reading characters and strings from the keyboard
• Displaying text in color
• Opening and closing files
• Reading data from files
• Writing data to files
• Setting and retrieving the system time and date
Common Software Interrupts
• INT 0, Division by zero
• INT 1, Trap, Single step Interrupt
• INT 2, NMI-Non Maskable Interrupt
• INT 3, Debug Interrupt
• INT 4, Arithmetic Overflow, change of sign bit
• INT 10h Video Services
• INT 16h Keyboard Services
• INT 1Ah Time of Day
• INT 17h Printer Services
• INT 1Ch User Timer Interrupt
• INT 21h MS-DOS Services
Example int 0
• You can run the following code and see that int 0 will occur
Mov ax, 10
Mov bl, 0
Div bl ; int 0 will be invoked automatically
Mov ax, 0x4C00
Int 21h
• However you will not be able to debug it and if you run it without
debugging you will be stuck in infinite loop
• This is because int 0 will return to div bl instead of next instruction
• Next we will hook and interrupt to better understand it
HOOKING AN INTERRUPT

• To hook an interrupt we change the vector corresponding to that interrupt

• As soon as the interrupt vector changes, that interrupt will be routed to the new handler

• For example
• If vector of int 0 is F000h:61AAh
• Then on int 0 CS will change to F000h and IP to 61AAh and program will start running from instruction at
F000h:61AAh after int 0
• If we change the vector of int 0 to 1957h:0110h then on int 0 program will run from 1957h:0110h after int 0

• Example 8.1 in BH shows how to hook int 0 such that every time this interrupt occurs “'You divided
something by zero.” message is shown on screen. Its show version is given on next slide
HOOKING AN INTERRUPT Example
Things to Note in Example
• Int 0 pushs flags, CS and IP on stack
• IP is of Div bx, not of next instruction
• Program will run infinitely as after iret we will return to DIV bx
• This is not the case in every interrupt
Template to hook Software interrupt n
newISR:
Store register
Body
Restore register
Iret
Start:
xor ax, ax
mov es, ax ; load zero in es
mov word [es:n*4], newISR; store offset at n*4
mov [es:n*4+2], cs ; store segment at n*4+2
BIOS AND DOS INTERRUPTS
• In IBM PC there are certain interrupts designated for user programs to
communicate with system software to access various standard
services like access to the floppy drive, hard drive, vga, clock etc

• Since the manufacturer knows the hardware it burns the software to


control its hardware in ROM.

• This basic interface to the hardware is called BIOS (basic input output
services)
BIOS AND DOS DATA AREA
• The BIOS data area, partially shown
in Table, contains system data used
by the ROM BIOS service routines.

• For example, the keyboard


typeahead buffer (at offset 001Eh)
contains the ASCII codes and
keyboard scan codes of keys waiting
to be processed by the BIOS.
Video Programming using int 10h
• Three Levels of Access
• When an application program needs to write characters on the screen in text mode, it
can choose among three types of output:
• MS-DOS-level access: using int 21h
• BIOS-level access: using int 10h
• Direct video memory access
• Functions/services of int 10h:
• Int 10h is software interrupt provided by BIOS to program video memory
• Int 10h provides several functions/services
• Function code is given in AH
• The list of most commonly used is given in table next slide
• Also see this link https://en.wikipedia.org/wiki/INT_10H
Video Programming using int 10h
• Video modes
• There are two basic video modes on Intel-based systems, text mode and
graphics mode.
• A program can run in one mode or the other, but not both at the same time:
• In text mode, programs write ASCII characters to the screen.
• In graphics mode, programs control the appearance of each screen pixel.
• A programmer can set the mode using int 10h service 0
Example int 10h function 01h

• Using function 1 of int 10 to change cursor size


• mov ah,1 ; function
• mov cx,0614h ; parameter, default color cursor size
• int 10h
• Try different values of CH and CL
Example int 10h function 13h

• Al is the write
mode in int 10h
service 13.
• 0th bitrepresent
if cursor should
be updated or
not
• 1st bit represents
if string contains
the settings or
not.
Example int 10h function 02h

mov ah,2
mov dh,10 ; row 10
mov dl,20 ; column 20
mov bh,0 ; video page 0
int 10h
Keyboard Input with INT 16h
• Int 16h is a software interrupt provided by bios to handle keyboard

• Keyboard input follows an event path beginning with the keyboard


controller chip and ending with characters being placed in an array
called the keyboard typeahead buffer (see Fig. in next slide).

• Up to 15 keystrokes can be held in the buffer because a keystroke


generates 2 bytes (ASCII code + scan code).
Read keystroke using int 16h function 00h

• Mov ah, 0
• Int 16h;
Print string and keyboard wait using BIOS
services
• Example 8.3 in book.
• Also see code given in comments
Scan codes of keys
Hardware Interrupts
Hardware Interrupts
• A hardware interrupt request (IRQ) is an electronic signal issued by an external (to the
processor) hardware device, to communicate that it needs attention from the operating
system (OS) or, if there is no OS, from the "bare-metal" program running on the CPU.

• Such external devices may be part of the computer (e.g., disk controller) or they may be
external peripherals. For example, pressing a keyboard key or moving the mouse triggers
hardware interrupts that cause the processor to read the keystroke or mouse position

• Occasionally, programs must disable hardware interrupts when performing sensitive


operations on segment registers and the stack. The CLI (clear interrupt flag) instruction
disables interrupts, and the STI (set interrupt flag) instruction enables interrupts
Hardware Interrupts
• A Single pin outside the processor called the INT pin is used by
external hardware to generate interrupts.

• There are many devices generating interrupts and there is only one
pin going inside the processor and one pin cannot be technically
derived by more than one source

• Therefore a controller called the Programmable Interrupt Controller


(8259 PIC) is used to schedule the interrupts (priority Schedule)
PIC-Programmable Interrupt Controller
• It has eight input signals and one output signal.

• It assigns priorities to its eight input pins from 0 to 7 so that if more than one interrupt comes at the
same times
• 0 has the highest priority and 7 has the lowest
• A lower-level interrupt cannot interrupt a higher-level one still in progress.

• The highest priority one is forwarded and the rest are held till that is serviced.

• The rest are forwarded one by one according to priority after the highest priority one is completed

• The original IBM XT computer had one PIC so there were 8 possible interrupt sources. However IBM
AT and later computers have two PIC totaling 16 possible interrupt sources.
IRQ
• The eight input signals to the PIC are called Interrupt Requests (IRQ).
• The eight lines are called IRQ 0 to IRQ 7
• Each IRQ is mapped to a specific interrupt in the system, as shown in table
IRQ Interrupt Description
0 8h System timer (18.2 times/second)

1 9h Keyboard
2 0Ah Programmable Interrupt Controller

3 0Bh COM2 (serial port 2)


4 0Ch COM1 (serial port 1)
5 0Dh LPT2 (parallel port 2) used for sound
card or the network card or the modem

6 0Eh floppy disk drive


7 0Fh LPT1 (parallel port 1)
IRQ
• This mapping is done by the PIC and not the processor.

• The actual mechanism fetches one instruction from the PIC whenever the INT pin
is signaled instead of the memory.

• We can program the PIC to generate a different set of interrupts on the same
interrupt requests.

• From the perspective of an assembly language programmer an IRQ 0 is translated


into an INT 8 without any such instruction in the program and that’s all
IRQ
• Therefore an IRQ 0, the highest priority interrupt, is generated by the
timer chip at a precise frequency and the handler at INT 8 is invoked
which updates the system time.
• A key press generates IRQ 1 and the INT 9 handler is invoked which
stores this key.
• To hook the timer and keyboard interrupts one can replace the
vectors corresponding to interrupt 8 and 9 respectively.
IRQ
• When processor received a hardware interrupt number from PIC at its
int port, it will do the same thing to handle it as any other interrupt.
• That is , push old values of flags, CS and IP, read IVT table to to to ISR
of interrupt and execute it.
• At the end of servicing the interrupt the handler should inform the
PIC that it is completed so that lower priority interrupts can be sent
from the PIC.
• This signal is called an End Of Interrupt (EOI) signal and is sent
through the I/O ports of the PIC.
• I/O ports will be discussed soon
• Processor is not always
paying attention to
peripherals, if it was
how will it run other
processes?
• To get processors
attention peripherals
send IRQ to PIC
• PIC then sends INT to
processor
• Processor can then ran
the ISR and data us
usually read/write on
devices in the ISR
• Data is read/written
using BUS
• EOI is informed to PIC
also via BUS
I/O PORTS
• PIC is used to get the attention of processor in request of a device
• But data is transfer to/from device using BUS
• Each device has 8 or 16 bit port number.
• To communicate to a device, port number is placed on address bus
• A pin is set on control bus to show that the communication is to be between I/O
device and CPU (not CPU and memory)
• Lower 16 bits of the address bus as used to specify port number, this means that
there can be total of 65536 possible I/O ports
• For example 20 and 21 port numbers are for PIC, 60 to 64 for Keyboard, 378 for
the parallel port etc.
IN and OUT instructions
• Used to read and write data to ports. (just like mov is used to read write to mem)
• Version 1, when 8bit port number
• In al, <8bitport number>; read a byte from port number in al
• In ax, <8bitport number>; read a word from port number in al
• Out <8bit port number>, al, write a byte in al to port number
• Out <8bit port number>, ax, write a word in ax to port number
• Version 2, when 16bit port number (port number has to be place in dx)
• Mov dx, <16 bit port number>
• In al, dx read a byte from port number in al
• In ax, dx; read a word from port number in al
• Out dx, al, write a byte in al to port number
• Out dx, ax, write a word in ax to port number
Example
• To read data from keyboard
• in al, 0x60, this will read scan code in al
• In ax, 0x60; this will read asci in ah and scan code in al
• Other example
• mov dx, 0x389; DX can contain a port number
• in ax,dx ; input word from port named in DX
• out dx,ax ; output word to the same port
• in ax,0xFFFF; will give error
PIC Ports
• Programmable interrupt controller has two ports 20 and 21.
• Port 20 is the control port while port 21 is the interrupt mask register which can be used for selectively
enabling or disabling interrupts.
• A 0 bit will enable an interrupt and a 1 bit disables it
• Program to disable the keyboard using this port. Is given below
• After running this program your keyboard will be disabled. Run the DOSBOX again to restore it to default
setting
How Keyboard Works
• We have seen earlier int 16h, a software interrupt that is generated by processor to wait for the keyboard
stroke

• Int 9h is a hardware interrupt that is generated when a key is pressed.

• Figure in slide 28 showed then when int 9h is invoked scan code and asci of pressed key are moved to buffer.

• For each key the scan code comes twice, once for the key press and once for the key release. Both are scan
codes and differ in one bit only.
• The lower seven bits contain the key number while the most significant bit is clear in the press code and set in the release
code.
• You can read the asci and scan code of pressed key using keyboard port
• in al, 0x60, this will read scan code in al
• In ax, 0x60; this will read asci in ah and scan code in al
How Keyboard Works
• If we press Shift-A resulting in a capital A on the screen, the controller has sent
the press code of Shift, the press code of A, the release code of A, the release
code of Shift and the interrupt handler has understood that this sequence
should result in the ASCII code of ‘A’.

• The ‘A’ key always produces the same scan code whether or not shift is pressed.
It is the interrupt handler’s job to remember that the press code of Shift has
come and release code has not yet come and therefore to change the meaning
of the following key presses. Even the caps lock key works the same way.

• You can hook int 9h and change what happens when a key is pressed
Hooking an interrupt to show scancode at every int9

• Run the code given in notes below


• See that at press and release of every key int 9 is invoked
• Int 9 is hooked in example it will display the scan code on screen
• Note that scan code changes on press and unpress
Examples: Hooking int 9
• Example 9.2 from book
• Example 9.3 from book
• Example 9.4 from book
• Example 9.5 from book
Question
• What is the difference between int 9h and int 16h?
Template to hook Hardware interrupt n
• newISR:
• Store register
• Body
• mov al, 0x20
• out 0x20, al ; send EOI to PIC
• Restore register
• Iret
• Start:
• xor ax, ax
• mov es, ax ; load zero in es
• mov word [es:n*4], newISR; store offset at n*4
• mov [es:n*4+2], cs ; store segment at n*4+2
Controlling speakers through I/O port
• See the example given here
• http://www.intel-assembler.it/portale/5/make-sound-from-the-speak
er-in-assembly/8255-8255-8284-asm-program-example.asp
• 16.2 16.3 Irvine
• Chapter 8 BH
• http://jbwyatt.com/253/emu/8086_bios_and_dos_interrupts.html

You might also like