CNE302 Computer Organization and Architecture: Lecture 01 - Introduction Instructor
CNE302 Computer Organization and Architecture: Lecture 01 - Introduction Instructor
Lecture 01 - Introduction
Instructor: Dr. Tarek Abdul Hamid
What is “Computer Architecture” ?
Computer Architecture =
Computer Organization
High-Level Languages
Machine independent High-Level Language
Machine specific Low-Level Language
Assembly Language
Machine Language
Hardware
Computers only deal with binary data, hence the instructions must be in binary
format (0s and 1s) .
The set of all instructions (in binary form) makes up the computer's machine
language. This is also referred to as the instruction set.
Opcode field which stands for operation code and it specifies the particular
operation that is to be performed.
Each operation has its unique opcode.
Operands fields which specify where to get the source and destination operands
for the operation specified by the opcode.
The source/destination of operands can be a constant, the memory or one of the
general-purpose registers.
Editor
Allows you to create and edit assembly language source files
Assembler
Converts assembly language programs into object files
Object files contain the machine instructions
Linker
Combines object files created by the assembler with link libraries
Produces a single executable program
Debugger
Allows you to trace the execution of a program
Allows you to view machine instructions, memory, and registers
Datapath Memory
Control
I/O Devices
Memory & Storage
Control Input
Main Memory B
Processor U Output
Disk Storage
S
Input devices Datapath Disk
Output devices
Bus: Interconnects processor to memory and I/O Network
Network: newly added component for communication
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Computer Organization and Architecture Dr.Tarek Abdul Hamid
Address Space
Processor Memory
Control Bus address bus
Address Register a bits 0
Signals control transfer
1
data bus
of data 2
Data Register d bits 3
Read request
Write request read
Bus Control
write ...
Done transfer
done
2a – 1
Bigger
Main Memory (1 – 2 GB) Faster Memory Bus
Access time: 50 – 70 ns
Memory
Next Program
Counter
Program Counter
A
Instruction
Instruction Data
Registers L
Cache U Cache
Control
Register File
General-purpose registers used for intermediate computations
Instruction Fetch
Compute address of next instruction
Instructions are then sent to the instruction cache, data to the data cache
Also receives the processed data and sends it to the main memory
This unit receives the programming instructions and decodes them into a form that is
understandable by the processing units, i.e. the ALU or FPU
The new breed of popular microprocessors have not one but two almost identical
ALU’s that can do calculations simultaneously, doubling the capability
This notation can represent extremely small and extremely large numbers in a
compact form
The ALU can do these calculations as well, but will do them very slowly
Both ALU & FPU have a very small amount of super-fast private memory placed
right next to them for their exclusive use. These are called registers
The ALU & FPU store intermediate and final results from their calculations in these
registers
Processed data goes back to the data cache and then to main memory from these
registers
Tasks include fetching instructions & data, storing data, managing input/output
devices
ISA is what is visible to the programmer (and ISA might be different for O.S. and
applications)
IBM
704, 709, 70xx etc.. From 1955 till 1965
360, 370, 43xx, 33xx From 1965 to the present
Power PC
DEC
PDP-11, VAX From 1970 till 1985
Alpha (now Compaq, now HP) in 1990’s
SUN
Sparc, Ultra Sparc 1985 0n
MIPS-SGI
Mips 2000, 3000, 4400, 10000 from 1985 on
Word at address 0
Word at address 4
Word at address 8