Chapter two

Computer arithmetic

Integers Arithmetic
Representation
Addition and subtraction
Multiplication and Division

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 Arithmetic & Logic Unit (ALU)
Part of the computer that actually performs arithmetic

and logical operations on data

All of the other elements of the computer system are

there mainly to bring data into the ALU for it to

process and then to take the results back out
Based on the use of simple digital logic devices that

can store binary digits and perform simple Boolean

logic operations
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 ALU input output

Control
Signals Flags

ALU
Operand Result
Registers Registers

Figure 10.1 ALU Inputs and Outputs

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 Integers representation
Integers

numbers without decimal point/fraction parts

Arbitrary representation binary numbers could be:

-1101.01012 = -13.312510

we do not have the benefit of minus signs and

periods.
 Only binary digits (0 and 1) may be used to represent

4 numbers.
 Representation
Sign-Magnitude Representation
most significant (leftmost) bit in the word as a sign

bit.
If the sign bit is 0 >> the number is positive;

If the sign bit is 1 >> the number is negative.

examples

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 Representation
There are several drawbacks to sign-magnitude

representation.
One is that addition and subtraction require a

consideration of both the signs of the numbers and their

relative magnitudes to carry out the required operation.
Another drawback is that there are two representations

of 0

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 Representation
Twos Complement Representation
2’s complement => 1’s complement +1

1’s complement => 0’s to 1 and 1’s to 0

the most significant bit as a sign bit,

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 2’s complement
for a positive number,
the sign bit,an-1 is zero.
The remaining bits represent the magnitude of the number
in the same fashion as for sign magnitude
For negative number,
sign bit , an-1 is one.
Magnitude is found applying 2’s complement

Example:

+5:0101

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- 5:1011
 Addition and Subtraction
2’s complement addition
If the operand to add is negative convert to 2’s
complement, then add
If the result of the operation is positive, we get a
positive number in true binary form
If the result of the operation is negative, we get a
negative number in twos complement form
N.B discard carry while addition of MSB
Overflow occurs if sum cannot be expressed with
the same bit of operands including sign bit.

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 OVERFLOW RULE

If two numbers are added, and they are

both positive or both negative, then
overflow occurs if and only if the result
has the opposite sign.

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 Examples
1001 = –7 1100 = –4
+0101 = 5 +0100 = 4
1110 = –2 10000 = 0
(a) (–7) + (+5) (b) (–4) + (+4)

0011 = 3 1100 = –4
+0100 = 4 +1111 = –1
0111 = 7 11011 = –5
(c) (+3) + (+4) (d) (–4) + (–1)

0101 = 5 1001 = –7
+0100 = 4 +1010 = –6
1001 = Overflow 10011 = Overflow
(e) (+5) + (+4) (f) (–7) + (–6)

Figure 10.3 Addition of Numbers in Twos Complement Representation

Exercise
-4+4
-4+(-1)
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-7+(-6)
 1001 = –7 1100 = –4
+0101 = 5 +0100 = 4
1110 = –2 10000 = 0
(a) (–7) + (+5) (b) (–4) + (+4)

0011 = 3 1100 = –4
+0100 = 4 +1111 = –1
0111 = 7 11011 = –5
(c) (+3) + (+4) (d) (–4) + (–1)

0101 = 5 1001 = –7
+0100 = 4 +1010 = –6
1001 = Overflow 10011 = Overflow
(e) (+5) + (+4) (f) (–7) + (–6)

Figure 10.3 Addition of Numbers in Twos Complement Representation

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 Subtraction
To subtract one number (subtrahend) from another

(minuend), take the twos complement (negation) of the

subtrahend and add it to the minuend.
E.g 2-7,5-2,….

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 Examples
0010 = 2 0101 = 5
+1001 = –7 +1110 = –2
1011 = –5 10011 = 3

(a) M = 2 = 0010 (b) M = 5 = 0101

S = 7 = 0111 S = 2 = 0010
–S = 1001 –S = 1110

1011 = –5 0101 = 5
+1110 = –2 +0010 = 2
11001 = –7 0111 = 7

(c) M =–5 = 1011 (d) M = 5 = 0101

S = 2 = 0010 S =–2 = 1110
–S = 1110 –S = 0010

0111 = 7 1010 = –6
+0111 = 7 +1100 = –4
1110 = Overflow 10110 = Overflow

(e) M = 7 = 0111 (f) M = –6 = 1010

S = –7 = 1001 S = 4 = 0100
–S = 0111 –S = 1100

Figure 10.4 Subtraction of Numbers in Twos Complement Representation (M – S)

Exercise
 5-2
 -6-4
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 0010 = 2 0101 = 5
+1001 = –7 +1110 = –2
1011 = –5 10011 = 3

(a) M = 2 = 0010 (b) M = 5 = 0101

S = 7 = 0111 S = 2 = 0010
–S = 1001 –S = 1110

1011 = –5 0101 = 5
+1110 = –2 +0010 = 2
11001 = –7 0111 = 7

(c) M =–5 = 1011 (d) M = 5 = 0101

S = 2 = 0010 S =–2 = 1110
–S = 1110 –S = 0010

0111 = 7 1010 = –6
+0111 = 7 +1100 = –4
1110 = Overflow 10110 = Overflow

(e) M = 7 = 0111 (f) M = –6 = 1010

S = –7 = 1001 S = 4 = 0100
–S = 0111 –S = 1100

Figure 10.4 Subtraction of Numbers in Twos Complement Representation (M – S)

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 Multiplication
unsigned integers multiplication
Using paper and pencil:

 Multiplication involves the generation of partial products, one for each

digit in the multiplier. These partial products are then summed to produce

the final product.

1011 Multiplicand (11)

1101 Multiplier (13)
1011
0000
Partial products
1011
1011
10001111 Product (143)

Figure 10.7 Multiplication of Unsigned Binary Integers

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 Multiplication
flow chart of unsigned number multiplication

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 Multiplication:
Example:
Multiplicand(M) = 1011 (11)
Multiplier(Q)=1101(13)
Solution: ? 1000 1111 (143)
Multiplicand
Mn-1 M0

Add Shift and Add

n-Bit Adder
Control Logic

Shift Right

C An-1 A0 Qn-1 Q0
Multiplier

(a) Block Diagram

C A Q M
0 0000 1101 1011 Initial Values

0 1011 1101 1011 Add First

0 0101 1110 1011 Shift Cycle
Second
0 0010 1111 1011 Shift Cycle

0 1101 1111 1011 Add Third

0 0110 1111 1011 Shift Cycle

1 0001 1111 1011 Add Fourth

0 1000 1111 1011 Shift Cycle

(b) Example from Figure 9.7 (product in A, Q)

Figure 10.8 Hardware Implementation of

Unsigned Binary Multiplication

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 multiplication
Efficient paper and pencil multiplication using
HW

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 Signed number multiplication-booth’s
algorism
Straight forward multiplication will not work if

multiplicand is negative:
Note that this is accomplished by padding out each

partial product to the left with binary 1s.

E.g if multiplicand is negative

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 Signed number multiplication-booth’s
algorism
Example: +7*+3

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 Booth’s Algorism-exercise
Use booth’s algorism to find product of:
A) 7*-3
B)-7*3
C)-7*-3

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 0111 0111
´ 0011 (0) ´ 1101 (0)
11111001 1–0 11111001 1–0
0000000 1–1 0000111 0–1
000111 0–1 111001 1–0
00010101 (21) 11101011 (–21)
(a) (7) ´ (3) = (21) (b) (7) ´ (–3) = (–21)

1001 1001
´ 0011 (0) ´ 1101 (0)
00000111 1–0 00000111 1–0
0000000 1–1 1111001 0–1
111001 0–1 000111 1–0
11101011 (–21) 00010101 (21)
(c) (–7) ´ (3) = (–21) (d) (–7) ´ (–3) = (21)

Figure 10.14 Examples Using Booth's Algorithm

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 Division
Paper and Pencil approach(long division)
First, the bits of the dividend are examined from left to
right, until the set of bits examined represents a number
greater than or equal to the divisor;
this is referred to as the divisor being able to divide the
number.
Until this event occurs, 0s are placed in the quotient
from left to right.
When the event occurs, a 1 is placed in the quotient and
the divisor is subtracted from the partial dividend.
The result is referred to as a partial remainder

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 Division-machine algorism corresponds to
long division

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 Division-Example (7/3)

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 Floating-Point Arithmetic

Floating –point representation

Floating-point Addition and
Subtraction
Floating Point Multiplication
and Division
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 Floating-Point representation
With a fixed-point notation (e.g., twos complement)

it is possible to represent a range of positive and

negative integers centered on 0.
By assuming a fixed binary or radix point, this

format allows the representation of numbers with a

fractional component as well.
E.g 00011001.01001

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 Floating-Point representation
Limitation of fixed point representation:
Very large numbers cannot be represented, can
very small fractions.
Furthermore, the fractional part of the quotient in a
division of two large numbers could be lost.
Decimal system has scientific Notation to overcome
this limitation:
E.g
 976,000,000,000,000 =9.76*1014
 0.0000000000000976 =9.76*10-14

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 Floating-Point representation
Likewise in binary number we can represent using:

This number can be stored in a binary word with three

fields:
Sign: plus or minus
Significand S
Exponent E
The base B is implicit and need not be stored because it is
the same for all numbers
Typically, it is assumed that the radix point is to the right
of the leftmost, or most significant, bit of the significand.
That is, there is one bit to the left of the radix point.
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 Floating-Point representation
Typical 32-bits floating-point format

The leftmost bit stores the sign of the number(0=+ve,

1=-ve)
Next 8 bits , exponent
23 bits , significand

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 Floating-Point representation
The exponent value is stored in the next 8 bits.
The representation used is known as a biased representation.
A fixed value, called the bias, is subtracted from the field to get the true
exponent value
Typical bias value = 2k-1 - 1, where k is the number of bits in the binary
exponent
In 32-bits floating-point representation bits of exponent=8-bits
Bias value = 2 8-1 -1 = 27-1= 128-1=127
Normally exponent has value b/n 0 and 255
E.g if exponent = 10100 = 20, thus
True exponent = 20-127=-107
The final portion of the word (23 bits in this case) is the significand

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 Floating-Point representation

To simplify operations on floating-point numbers, it is

typically required that they be normalized.

 A normalized number is one in which the most

significant digit of the significand is nonzero.

For base 2 representation, a normalized number is

therefore one in which the most significant bit of the

significand is one.

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 Floating-Point representation
number may be normalized by shifting the radix point
to the right of the leftmost 1 bit and adjusting the
exponent accordingly.
Note the following from example below:
The sign is stored in the first bit of the word.
The first bit of the true significand is always 1 and need
not be stored in the significand field.
 The value 127 is added to the true exponent to be stored
in the exponent field.
The base is 2.

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 Example
1.1010001*210100 = 0 10010011 101 0001 0000 0000 0000 0000
= 1.6328125*220
–1.1010001*210100 = 1 10010011 101 0001 0000 0000 0000 0000
= –1.6328125*220
1.1010001*2–10100 = 0 01111011 101 0001 0000 0000 0000 0000
= 1.6328125*2–20
–1.1010001*2–10100 = 1 01111011 101 0001 0000 0000 0000 0000
= –1.6328125*2–20

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 IEEE Standard for Binary Floating-Point
Representation
The most important floating-point representation is
defined in IEEE Standard 754, adopted in 1985.
portability of programs from one processor to another
and to encourage the development of sophisticated,
numerically oriented programs.
The standard has been widely adopted and is used on
virtually all contemporary processors and arithmetic
coprocessors.
The IEEE standard defines both a 32-bit single and a 64-
bit double format with 8-bit and 11-bit exponents,
respectively.
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 IEEE 754 format

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 Floating-point arithmetic
addition and subtraction
it is necessary to ensure that both operands have the same
exponent value.
This may require shifting the radix point on one of the
operands to achieve alignment.
Multiplication and division are more straightforward.
A floating-point operation may produce one of these
conditions:
Exponent overflow: A positive exponent exceeds the
maximum possible exponent value. In some systems, this may
be designated as -∞ or + ∞
 Exponent underflow: A negative exponent is less than the
minimum possible exponent value
 This means that the number is too small to be represented, and it may
be reported as 0.
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 Floating-point arithmetic
A floating-point operation may produce one of these
conditions: cont..
Significand underflow:
In the process of aligning significands, digits may
flow off the right end of the significand.
Some form of rounding is required.
 Significand overflow:
The addition of two significands of the same sign
may result in a carry out of the most significant bit.
This can be fixed by realignment.

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 Addition and Subtraction
There are four basic phases of the algorithm for addition
and subtraction:
1. Check for zeros.
2. Align the significands.
3. Add or subtract the significands.
4. Normalize the result.

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 Addition and subtraction
Zero Check:

Because addition and subtraction are identical

except for a sign change, the process begins by

changing the sign of the subtrahend if it is a subtract
operation.
Next, if either operand is 0, the other is reported as

the result.

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 Addition and subtraction
Significand alignment.
Alignment may be achieved by shifting either the
smaller number to the right (increasing its
exponent) or shifting the larger number to the left.
Because either operation may result in the loss of
digits, it is the smaller number that is shifted; any
digits that are lost are therefore of relatively small
significance
The alignment is achieved by repeatedly shifting
the magnitude portion of the significand right 1
digit and incrementing the exponent until the two
exponents are equal

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 Addition and Subtraction
Addition
 two significands are added together, taking into
account their signs.
There is also the possibility of significand overflow
by 1 digit.
If so, the significand of the result is shifted right and
the exponent is incremented.
An exponent overflow could occur as a result; this would
be reported and the operation halted.

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 Addition and Subtraction
Normalization

The final phase normalizes the result.

Normalization consists of shifting significand digits left

until the most significant digit is nonzero

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 Examples(reading assignment)
Represent 0.5 and 0.25 using the following floating
point representation:
 6 bit normalized signed 2’s complement fraction
mantissa(significands), including the sign.
 1 bit for the sign, 5 bits for the mantissa.
 3 bit biased exponent.
 Range of representation is -4 to 3.
 Add 4 to bias it.

Follow the steps of floating point addition to find the

sum of the two numbers.

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 Examples (Contd.)
 0.5  0.1 X 20
 0 10000 100 (Already normalized).

 0.25  0.01 X 20
 0 01000 100
 0 10000 011 (After normalization).

0 10000 100
+ 0 10000 011

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 Examples (Contd.)
1. Check for Zero.
 None of the numbers is 0.

2. Align Mantissas(significands)
0 10000 100
0 10000 100 +
+ 0 10000 011 0 01000 100

3. Add

+ 0 10000 The result is

0 01000 0 11000 100

0 11000
4. Normalize
 Already normalized.

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 Examples (Contd.)
 Add 0.5 to –0.25

0.5 0.1 X 20 0 10000 100

-0.25 -0.01 X 20 - 0 01000 100 1 11000 100
1. Check for zeros.
 None.
2. Align Mantissas(significands).
 Already Aligned.
3. Add Mantissas. 0 10000 Preliminary
+ 1 11000 0 01000 100
1 0 01000 Result

4. Normalize the result.

0 10000 011 Final Result

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 Examples (Contd.)
 Add -0.5 to 0.25

-0.5 -0.1 X 20 - 0 10000 100 1 10000 100

0.01 X 20 0 01000 100 0 10000 011

0.25
1. Check for zeros.
 None.
2. Align Mantissas(significands).
 0 10000 011 0 01000 100

3. Add Mantissas. + 1 10000

Preliminary
0 01000 1 11000 100
1 11000 Result
4. Normalize the result.
 Already Normalized.

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 Overflow in Floating-Point Operations
What about overflow?
If adding the mantissas produces an overflow,
 we shift the result’s mantissa to the right 1 position and
increment the exponent by 1.

If incrementing the exponent produces and exponent

overflow,
 the operation is terminated and an overflow error is reported.

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 Examples (Contd.)
 Add 0.5 to 0.5

0.5 0.1 X 20 0 10000 100

0.5 0.1 X 20 0 10000 100
1. Check for zeros.
 None.
2. Align Mantissas(significands).
 Already Aligned.

3. Add Mantissas. 0 10000

+ 0 10000
Overflow
1 00000 0 10000 101
Correction
4. Normalize the result.
 Already Normalized.

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 Examples (Contd.)
 Add 4 to 4

4 0.1 X 23 0 10000 111

4 0.1 X 23 0 10000 111
1. Check for zeros.
 None.
2. Align Mantissas(significands).
 Already Aligned.

3. Add Mantissas. 0 10000

+ 0 10000
1 00000 Overflow

 Attempting to correct the overflow will cause the exponent to

exceed its limit.
 Cannot correct this overflow.

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 Multiplication of Floating-Point Numbers
Multiplication of floating-point numbers is a four step
process:
Check for zeros.
Add the exponents.
Multiply the mantissas.
Normalize the product.

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 Division of Floating-Point Numbers
Division is done by:
Check for zeros.
Align the dividend.
Subtract the exponents.
Divide the mantissas.

All of the operations on floating-point numbers have

been simplified so that the same hardware can be used
for floating-point numbers and integers.

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 Quiz 1( 5 or 10 marks) G3&4
For the following numbers, 0.4 and 0.30

A. find the floating point representation with 6 bit

normalized signed 2’s complement fraction
mantissa(significands), including the sign(1 bit for the
sign, 5 bits for the mantissa) and3 bit biased exponents

B. find the sum of the two numbers

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 Quiz 1( 5 or 10 marks)G5&6
For the following numbers, 0.4 and 0.30

A. find the floating point representation with 8 bit

normalized signed 2’s complement fraction
mantissa(significands), including the sign(1 bit for the
sign, 7 bits for the mantissa) and 5 bit biased exponents

B. find the difference of the two numbers

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