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Lecture 3 - Data Transfer

The document discusses data transfer instructions in the ARM instruction set. It explains that ARM instructions fall into three categories, including data transfer instructions which move values between memory and registers. It provides the syntax and operation of the MOV instruction, including examples of using immediate values, registers, and shifted registers as operands. It describes the limitations of using immediate values with MOV due to the encoding structure, and how constants outside the valid range can still be loaded using alternative instructions.

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Suhaib Abugdera
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55 views

Lecture 3 - Data Transfer

The document discusses data transfer instructions in the ARM instruction set. It explains that ARM instructions fall into three categories, including data transfer instructions which move values between memory and registers. It provides the syntax and operation of the MOV instruction, including examples of using immediate values, registers, and shifted registers as operands. It describes the limitations of using immediate values with MOV due to the encoding structure, and how constants outside the valid range can still be loaded using alternative instructions.

Uploaded by

Suhaib Abugdera
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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ARM Assembly

Data transfer instructions


Data Transfer Instructions
The ARM instruction set
• ARM instructions fall into three categories:
– Data processing instructions (Ch. 7)
• operate on values in registers
– Flow control instructions (Ch. 8)
• change the program counter (PC)
– Data transfer instructions (Ch. 6)
• move values between memory and registers
Syntax
MOV{<cond>}{S} <Rd>, <shifter_operand>
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cond 0 0 I 1 1 0 1 S Ignored(0) Rd shifter operand

{<cond>} and {S} are optional – discussed in details later


<Rd> - destination register
<shifter_operand> are required and it can have different forms.
 if (<cond> is true)
• Rd  shifter_operand
• if((S==1) AND (Rd is R15)) CPSR  SPSR, will cover that later
Flags (if S is appended and Rd is not R15)
 N, Z, C (C is based on shifter operand)
Examples
MOV r4, r5 ; r4 := r5
MOV r3, #10 ; r3 := 0x0000 000A
; # indicates an immediate value
MOV r2, #&2C ; r2 := 0x0000 002C
; & used for a hexadecimal number
MOV r2, #0x2C ; 0x used for a hexadecimal number
MOV r3, #2_01011001 ; r3 := 0x0000 0059
; 2_ used for a binary number
MOV r1, #'A' ; r1 := 0x0000 0041
; ' ' used for an ASCII character
3 modes on <shifter_operand>
• <shifter_operand> = register
MOV r4, r5 ; r4 := r5

• <shifter_operand> = immediate data


 allowed immediate values are (in general):
(0 - 255) x 22n (0 ≤ n ≤ 15)

• <shifter_operand> = shifted registers


MOV R1, R0, LSL #2 ; R1 := R0 << 2
MOV R2, R0, LSR #1 ; R2 := R0 >> 1
Syntax
MOV{<cond>}{S} <Rd>, <shifter_operand>
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cond 0 0 I 1 1 0 1 S Ignored(0) Rd Rotate 8_bit immd

<shifter_operand> = immediate data


 In ARM state, allowed immediate values are: (0 - 255) x 22n
(0 ≤ n ≤ 15)
 In Thumb state, allowed immediate values are: (0 - 255) x 22n
(0 ≤ n ≤ 12)
Example

MOV R0, #0x10F ;Load 0x10F to R0

error: A1510E: Immediate 0x0000010F cannot


be represented by 0-255 and a rotation.
Not every constant can be used with MOV!
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cond 0 0 1 1 1 0 1 S Ignored(0) Rd Rotate 8_bit immd

Rotate value applied any number 0 - 255


to 8_bit immd

The way it works: the 8-bit immd is first multiplied by 2 and then the
result is rotated to the right by number of bits specified in Rotate.

• If number of bits between the first bit '1' and the last bit '1‘ of the constant are 6,
MOV can be used with that constant
• If the constant cannot be represented in this format, MOV cannot be used to load
that constant to the register.
MOV with an immediate operand
• Instead of using 12 bits for immediate value, the bit field is
divided into 4 + 8 bits.
• Rotation count is formed by doubling 4 bit value.
• Immediate value is then right-rotated by the count calculated
in previous step.

Illustration Source: http://www.davespace.co.uk/arm/introduction-to-arm/immediates.html


Example of Creating Constants with Rotation

No rotate 000000000000000000000000abcdefgh 0x000000FF


Right,2 bits gh000000000000000000000000abcdef 0x??
Right,4 bits efgh000000000000000000000000abcd 0xF000000F
Right,6 bits cdefgh000000000000000000000000ab 0x??
Right,8 bits abcdefgh000000000000000000000000 0xFF000000
. . .
Right,26 bits 000000000000000000abcdefgh000000 0x??
Right,28 bits 00000000000000000000abcdefgh0000 0x??
Right,30 bits 0000000000000000000000abcdefgh00 0x??
So, how to load 0x10F to the register?

MOV R0, #0x10F ;Load 0x10F to R0

LDR rd, =0x10F ;Assembler feature

• If the constant can not be formed using rotation, the


assembler will produce the constant in literal pool.
LDR r0, =0x1234ABCD;LDR r0, [pc, offset to literal pool]
…
DCD 0x1234ABCD

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