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Immediate Operands: ADD r3, r3, #1 Valid ADD r3, #1,#2 Invalid ADD #3, r1, r2 Invalid ADD r3, r2, #&FF (To Represent Hexadecimal Immediate, Use &)

This document discusses the barrel shifter functional unit in ARM architecture. It can perform five types of shifts and rotates on operand 2, including arithmetic shift left (ASL). If the I bit in an instruction is 0, operand 2 is a register that can be shifted by an immediate value or by another register. If the I bit is 1, operand 2 is an immediate value with a maximum representation of 255 for an 8-bit value.

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Rohith Thurlapati
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107 views

Immediate Operands: ADD r3, r3, #1 Valid ADD r3, #1,#2 Invalid ADD #3, r1, r2 Invalid ADD r3, r2, #&FF (To Represent Hexadecimal Immediate, Use &)

This document discusses the barrel shifter functional unit in ARM architecture. It can perform five types of shifts and rotates on operand 2, including arithmetic shift left (ASL). If the I bit in an instruction is 0, operand 2 is a register that can be shifted by an immediate value or by another register. If the I bit is 1, operand 2 is an immediate value with a maximum representation of 255 for an 8-bit value.

Uploaded by

Rohith Thurlapati
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Immediate data

Immediate operands :
ADD r3, r3, #1 valid
ADD r3, #1,#2 invalid
ADD #3, r1,r2 invalid
ADD r3, r2, #&FF ( to represent
hexadecimal immediate , use &)

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Barrel Shifter
•Barrel Shifter is a functional unit which can be used in a number of
different circumstances.
•It provides five types of shifts and rotates which can be applied to Operand2.

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Barrel Shifter

ASL: Arithmetic Shift left, this is synonym for LSL

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Barrel Shifter

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Examples of Barrel Shifter

• MOV r0, r0, LSL #1 ; r0 = r0 * 21

• MOV r1, r1, LSR #2 ; r1 = divide r1 by 4 (unsigned)

•MOV r2, r2, ASR #2 ; r2 = divide r2 by 4 (signed)

•MOV r3, r3, ROR#16 ; swap the top and bottom halves of r3

•ADD r5, r5, r3, LSL #4 ; 4-address instruction


;r5 = r5+ r3 * 24

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Operand 2

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I bit in the instruction

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If I bit is 0, operand 2 is Register

 Registers shifted by values:


 MOV r2, r2, LSR #1 ;shift r2 right by one bit
 RSB r10 r5, r11, ASR #14 ;shift r11 right by14 bits while sign extending,
then subtract r5 from that. Put the result in r10.

 Registers shifted by registers:


 BIC r11, r11, r1, LSL r0 ;take r1 and shift it left by r0, then use that as a
mask to clear bits in r11. Put the result in r11
 CMP r9, r8, ROR r0 ;take r8 and rotate it right by r0, then compare
that with r9. the result is in flags

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If I bit is 0,
operand 2 is in register

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If I bit is 1 – Immediate operand

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Instruction format

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 What is the maximum value that can be
represented by immediate operands?

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 What are the different ways to represent
operands ?

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Condition code

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Eg - to set condition bits

Setting condition bits § Simply add an ‘S’


following the arithmetic/ logic instruction
§ Example: ADDS r0,r1,r2 (in ARM)
This is equivalent to r0=r1+r2 and set the
condition bits for this operation

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Data Processing Instructions (3)

Conditional codes

+
Data processing instructions

+
Barrel shifter

=
Powerful tools for efficient coded 17programs
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Data Processing Instructions (4)

e.g.:

if (z==1) R1=R2+(R3*4)

compiles to

CMP

ADDEQS R1,R2,R3, LSL #2

( SINGLE INSTRUCTION ! )
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Instruction format

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