Analog to Digital Conversion

(ADC)
 Signal Types
Analog Signals
Analog signals – directly measurable
quantities in terms of some other
quantity
analog: continuously valued signal,
such as temperature or speed, with
infinite possible values in between
Examples:
•Thermometer – mercury height
rises as temperature rises
t
•Car Speedometer – Needle moves
farther right as you accelerate

•Stereo – Volume increases as you

turn the knob.
 Signal Types
Digital Signals
digital: discretely valued signal,
such as integers, encoded in binary
analog-to-digital converter: ADC,
A/D, A2D; converts an analog signal
to a digital signal
•Consist of only two states 1

– Binary States
– On and off
0
•Computers can only perform
processing on digitized signals

Examples:
• Light switch can be either on or off
• Door to a room is either open or closed
 Examples of A/D Applications
• Microphones - take your voice varying pressure waves in the air
and convert them into varying electrical signals
• Strain Gages - determines the amount of strain (change in
dimensions) when a stress is applied
• Thermocouple – temperature measuring device converts
thermal energy to electric energy

• Voltmeters
• Digital Multimeters
 Just what does an
A/D converter DO?

• Converts analog signals into binary words

 Analog-Digital Converter (ADC)
• An electronic integrated circuit which converts
a signal from analog (continuous) to digital
(discrete) form
• Provides a link between the analog world of
transducers and the digital world of signal
processing and data handling

t
 ADC Conversion Process
Two main steps of process
1.Sampling and Holding
2.Quantization and Encoding
Analog-to-Digital Converter

Quantizing
and
Encoding
Sampling and
Hold
t
Input: Analog Signal t
ADC Basic Principle:
• The basic principle of operation is to use the comparator principle to determine whether
or not to turn on a particular bit of the binary number output.

• It is typical for an ADC to use a digital-to analog converter (DAC) to determine one of
the inputs to the comparator
Quantization
• Quantization is the process of converting the sampled continuous- Valued signals into
discrete-valued data

Quantizing
The number of possible states that the converter can output is:
N=2^n
where n is the number of bits in the AD converter

Example: For a 3 bit A/D converter, N=2^3=8.

Analog quantization size:

Q=(V max -V min)/N = (10V – 0V)/8 = 1.25V

Q is the Resolution
Analog /Digital Conversion
2-Step Process:
Output Discrete
Voltage
• Quantizing - breaking down analog value is a
Ranges (V)
set of finite states
0 0.00-1.25
• Encoding - assigning a digital word or number to
each state and matching it to the input signal
1 1.25-2.50
Or Assigning a unique digital code to each state for
input into the microprocessor
2 2.50-3.75

3 3.75-5.00

4 5.00-6.25
Step 1: Quantizing
Example: You have 0-10V signals. Separate them into a 5 6.25-7.50
Set of discrete states with 1.25V increments. (How
.01did we get 1.25V?
6 7.50-8.75
(Discussed in previous slide)
States
7 8.75-10.0
Step 2. Encoding
• Here we assign the digital value (binary number) to each state for the computer to read.
Output

States Output Binary Equivalent

0 000
1 001
2 010
3 011
4 100
5 101
6 110
7 111
 Accuracy of A/D Conversion
There are two ways to best improve accuracy of A/D
conversion:

• increasing the resolution which improves the

accuracy in measuring the amplitude of the analog
signal.

• increasing the sampling rate which increases the

maximum frequency that can be measured.
 Resolution

• Resolution (number of discrete values the converter can

produce) = Analog Quantization size (Q)
(Q) = Vrange / 2^n, where Vrange is the range of analog
voltages which can be represented

• limited by signal-to-noise ratio (should be around 6dB)

• In our previous example: Q = 1.25V, this is a high resolution. A

lower resolution would be if we used a 2-bit converter, then
the resolution would be 10/2^2 = 2.50V.
Sampling
• It is a process of taking a sufficient number of discrete values at point on a waveform that
will define the shape of waveform.
• The more samples you take, the more accurately you will define the waveform.
• It converts analog signal into series of impulses, each representing amplitude of the
signal at given point…….

Sampling Rate

Frequency at which ADC evaluates analog signal. As we see in the second picture,
evaluating the signal more often more accurately depicts the ADC signal.
 Overall Better Accuracy

• Increasing both the sampling rate and the resolution you

can obtain better accuracy in your AD signals.
 ADC Process
Sampling & Hold

•Measuring analog signals at

uniform time intervals
– Ideally twice as fast as what
we are sampling

•Digital system works with

discrete states
– Taking samples from each t
location

•Reflects sampled and hold

signal
– Digital approximation
 ADC Process
Sampling & Hold

•Measuring analog signals at

uniform time intervals
– Ideally twice as fast as what
we are sampling

•Digital system works with

discrete states
– Taking a sample from each t
location

•Reflects sampled and hold

signal
– Digital approximation
 ADC Process
Sampling & Hold

•Measuring analog signals at

uniform time intervals
– Ideally twice as fast as what
we are sampling

•Digital system works with

discrete states
– Taking samples from each t
location

•Reflects sampled and hold

signal
– Digital approximation
 ADC Process
Quantization & Coding

•Use original analog

signal
 ADC Process
Quantization & Coding

•Use original analog

signal 11

•Apply 2 bit coding 10

01

00
K=22 00
01
10
11
 ADC Process
Quantization & Coding

•Use original analog

signal 11

•Apply 2 bit coding 10

01

00
K=22 00
01
10
11
 ADC Process
Quantization & Coding

•Use original analog

signal
•Apply 3 bit coding

K=23 000
001
010
011
100
101
110
111
 ADC Process
Quantization & Coding

•Use original analog

signal
•Apply 3 bit coding
•Better representation of
input information with
additional bits K=23 000 K=16 0000 K=…
•MCS12 has max of 10 001 .
010 .
bits 011 .
100 1111
101
110
111
 ADC Process-Accuracy
The accuracy of an ADC can be improved by increasing:

t t
Sampling Rate, Ts Resolution, Q
•Based on number of steps •Improves accuracy in
required in the conversion measuring amplitude of analog
process signal
•Increases the maximum •Limited by the signal-to-noise
frequency that can be ratio (~6dB)
measured
 ADC Process-Accuracy
The accuracy of an ADC can be improved by increasing:

t t
Sampling Rate, Ts Resolution (bit depth), Q
•Based on number of steps •Improves accuracy in
required in the conversion measuring amplitude of analog
process signal
•Increases the maximum
frequency that can be
measured
 ADC-Error Possibilities
• Aliasing (sampling)
– Occurs when the input signal is changing much faster
than the sample rate
– Should follow the Nyquist Rule when sampling
• Answers question of what sample rate is required
• Use a sampling frequency at least twice as high as the
maximum frequency in the signal to avoid aliasing
• fsample>2*fsignal
• Quantization Error (resolution)
– Optimize resolution
– Dependent on ADC converter of microcontroller
 Types of ADC

• Successive Approximation A/D Converter

• Flash A/D Converter
• Dual Slope A/D Converter
• Delta-Sigma A/D Converter
 Flash ADC
• Consists of a series of comparators, each one
comparing the input signal to a unique
reference voltage.

• The comparator outputs connect to the inputs

of a priority encoder circuit, which produces a
binary output
 Flash ADC
 Also known as parallel ADC
 Elements
• Encoder – Converts output
of comparators to binary
• Comparators
Flash ADC
 Flash ADC Example
Vin = 5.5V, Vref= 8V

0
Vin lies in between Vcomp5 & Vcomp6
0
Vcomp5 = Vref*5/8 = 5V
Vcomp6 = Vref*6/8 = 6V 1
1

Comparator 1 - 5 => output 1 1

Comparator 6 - 7 => output 0
1

Encoder Octal Input = sum(0011111) = 5 5.5V 1

Encoder Binary Output = 1 0 1
How Flash Works Flash ADC Circuit
As the analog input voltage exceeds
the reference voltage at each
comparator, the comparator
outputs will sequentially saturate to
a high state.
The priority encoder generates a
binary number based on the
highest-order active input, ignoring
all other active inputs.
 ADC Output

Advantages Disadvantages
Simplest in terms of
operational theory Lower resolution
Expensive
Most efficient in terms of For each additional output bit,
speed, very fast the number of comparators is
limited only in terms of doubled
comparator and gate
i.e. for 8 bits, 256
propagation delays
comparators needed
 Analog –to Digital Conversion Methods-
FLASH (SIMULTANEOUS ) ADC CONVERTER (1)…

The flash method utilizes comparators that

compare reference voltage with the analog
input voltage. When the input voltage exceeds
the reference voltage ,a HIGH is generated. A
comparator is not needed for all 0’s condition.
In general a
2n -1 comparators are required for converting to
an n- bit binary code. The number of bits in an
ADC is its resolution.

33
 FLASH (SIMULTANEOUS ) ADC CONVERTER (2)…

Figure 6 A 3-bit flash ADC

C7

C6

C5

C4

C3

C2

C1

34
 FLASH (SIMULTANEOUS ) ADC CONVERTER (3)… Operation of 3-bit flash ADC

 The flash method utilizes comparators that compare reference voltages with
the analog input voltage. When the input voltage exceeds the reference voltage
for a given comparator, a HIGH is generated.
 The reference voltage for each comparator is set by the resistive voltage-
divider circuit. The output of each comparator is connected to an input of the
8-input priority encoder.
 The encoder is enabled by a pulse on the EN input, and a 3-bit code
representing the value of the input appears on the encoder’s outputs. The
binary code is determined by the highest order input having a HIGH level.
 Assume the step size of 1 V. The voltage divider sets up reference levels for
each comparator so that there are 3 levels corresponding to 1V, 2V, 3V, 4V, 5V,
6V and 7V. The analog input is connected to other input of each comparator.
 With analog input <1V, all the seven comparator outputs will be LOW. Suppose
the analog input is between 2V and 3V, outputs C1 and C2 will be HIGH. The
priority encoder will respond to HIGH on C2, and will produce a binary output
of 010.
 
35
 FLASH (SIMULTANEOUS ) ADC CONVERTER (4)…
Example-3-bit Flash ADC

Determine the binary code output of the 3-bit Flash ADC for the input signal
And the encoder enable pulses as shown below. Assume VREF=+8V

36
 FLASH (SIMULTANEOUS ) ADC CONVERTER (5)
Solution -3-bit Flash ADC

The resulting digital output sequence: 100 (4) ,110(6),111(7),110(6),

100 (4), 010(2), 000(0), 001(1), 011 (3),101 (5),110 (6), 111(7)
Waveform of the resulting digital output sequence:

37
Dual Slope ADC
Dual Slope ADC

• Also known as Counter-Ramp or Digital Ramp ADC

• A dual slope ADC is commonly used in measurement instruments (such as DVM’s).

Dual Slope Function

– When an analog value is applied the capacitor begins to charge in a linear manner and
the oscillator passes to the counter.

– The counter continues to count until it reaches a predetermined value. Once this value
is reached the count stops and the counter is reset. The control logic switches the input
to the first comparator to a reference voltage, providing a discharge path for the
capacitor.

– As the capacitor discharges the counter counts.

– When the capacitor voltage reaches the reference voltage the count stops and the
value is stored in the register
 Dual Slope Converter
Vin
tFIX tmeas
t

• The sampled signal charges a capacitor for a fixed

amount of time
• By integrating over time, noise integrates out of the
conversion
• Then the ADC discharges the capacitor at a fixed rate
with the counter counts the ADC’s output bits. A longer
discharge time results in a higher count
 Dual Slope Converter
Advantages Disadvantages
• Input signal is averaged • Slow
• Greater noise immunity • High precision external
than other ADC types components required to
• High accuracy achieve accuracy
 Dual-Slope ADC – How It Works
• An unknown input voltage is applied to the input of the integrator and allowed to
ramp for a fixed time period (tu)
• Then, a known reference voltage of opposite polarity is applied to the integrator
and is allowed to ramp until the integrator output returns to zero (t d)
• The input voltage is computed as a function of the reference voltage, the constant
run-up time period, and the measured run-down time period
• The run-down time measurement is usually made in units of the converter's clock,
so longer integration times allow for higher resolutions
• The speed of the converter can be improved by sacrificing resolution

td
Vin  Vref
tu
 SIGMA - DELTA ADC
 This method is based on delta modulation where the
difference between two successive samples is quantized.

 The output of a delta modulator is a single bit data

stream where the relative number of 1’s and 0’s indicates
the level of amplitude of the input signal. The number of 1’s
over a given number of clock cycles establishes the signal
amplitude during that interval.

43
 SIGMA - DELTA ADC (2)…
Figure 10 A simplified illustration of sigma-delta analog-to-digital conversion.

 A maximum number of
1’s correspond to
maximum positive input
voltage. A number of
1’s equal to one - half
the maximum
corresponds to an input
voltage of 0.

 No 1’s correspond to
the maximum negative
input voltage.

44
 SIGMA - DELTA ADC
 The basic block diagram in Fig 11 accomplishes the conversion . The
analog input signal and the analog signal form the converted quantized
bit stream form the DAC in the feedback loop are applied to the
summation point .

 The difference signal output of the sum is integrated and the 1-bit
ADC increases or decreases the number of 1’s depending on the
difference signal. This action attempts to keep the quantization signal
that is feedback equal to the incoming analog signal. The 1 bit
quantizer is essentially a comparator followed by a latch.

The single bit data stream is converted to as series of binary codes

.The counter counts 1’s in the quantized data stream for successive
intervals .The code in the counter then represents the amplitude of the
analog input signal for each interval.

45
 Delta-Sigma ADC – How It Works
• Input over sampled, goes to integrator
• Integration compared with ground
• Iteration drives integration of error to zero
• Output is a stream of serial bits
 Sigma-Delta ADC

Advantages Disadvantages

• High resolution • Slow due to

• No precision external oversampling
components needed
 Successive Approximation ADC

• A Successive Approximation Register (SAR) is

added to the circuit
• Instead of counting up in binary sequence, this
register counts by trying all values of bits
starting with the MSB and finishing at the LSB.
• The register monitors the comparators output
to see if the binary count is greater or less
than the analog signal input and adjusts the
bits accordingly
 Successive - approximation ADC (1)…

the basic block diagram of a 4 bit Successive - approximation ADC . It consists of a DAC,
Successive-Approximation Register (SAR), and a comparator

49
 Successive - approximation ADC (2)… Basic operation

 The input bits of the DAC are enabled one at a time starting with the
MSB
 As each bit is enabled the comparator produces an output that
indicate whether the input signal voltage is greater or lesser than the
output of DAC.
If the DAC output is greater than the input signal ,the comparator’s
output is LOW, causing the bit in the register to reset.
If the DAC output is less than the input signal, the bit 1 is retained in
the register.
The system does this with the MSB first, then the next right bit of MSB,
then the next and so on.
After all the bits in the DAC are tried , the conversion cycle is complete.

50
 Successive - approximation ADC (3)…
Illustration of Basic operation with an example

• Assume that the DAC has the following

output characteristics:
Vout=8V for the 23 bit (MSB),
Vout =4V for the 22 bit,
Vout =2V for the 21 bit, and
Vout =1V for the 20 bit (LSB).

51
 Step 1: Step 2:
23 bit (MSB) = 1 22 bit =1
The output of the DAC is 8 V. The output of the DAC is 4 V.
Since this is greater than the input of Since this is less than the input of
5.1 V, the output of the comparator is LOW, causing the 5.1 V, the output of the comparator switches to
MSB in the Successive Approximation Register (SAR) to
be reset to a 0
HIGH, causing this bit retained In SAR .

Step 3: Step 4:
21 bit = 1 20 bit =1
The output of the DAC is 6 V. The output of the DAC is 5 V.
Since this is greater than the input of 5.1 V, the output Since this is less than the input of 5.1 V, the output of the
of the comparator switches to LOW, causing this bit to be reset to 0. comparator switches to HIGH, causing this bit retained in SAR. 52
 Successive - approximation ADC (6)
Illustration of Basic operation with an example

After 4 steps, conversion cycle is completed. Binary code in the register is

0101, which is approximately the binary value of the input of 5.1 V.

Vout=8V for the 23 bit (MSB),

Vout =4V for the 22 bit,
Vout =2V for the 21 bit, and
Vout =1V for the 20 bit (LSB).

53
 Successive Approximation
Is Vin > ½ ADC range?

- • Sets MSB
SAR DAC
VIN + • Converts MSB to
1000 0000
0100
analog using DAC
Out • Compares guess to
If no, then test next bit input
• Set bit
• Test next bit
 Successive Approximation
Advantages Disadvantages

• Capable of high speed and • Higher resolution successive

reliable approximation ADC’s will be
• Medium accuracy compared slower
to other ADC types • Speed limited to ~5Msps
• Good tradeoff between speed
and cost
• Capable of outputting the
binary number in serial (one
bit at a time) format.
 Successive Approximation ADC
 Elements
• DAC = Digital to Analog Converter
• EOC = End of Conversion
• SAR = Successive Approximation Register
• S/H = Sample and Hold Circuit
• Vin = Input Voltage
• Comparator
• Vref = Reference Voltage
ADC Types Comparison
ADC Resolution Comparison
Dual Slope
Flash
Successive Approx
Sigma-Delta

0 5 10 15 20 25
Resolution (Bits)

Speed Cost Resolution

Type
(relative) (relative) (bits)
Dual Slope Slow Med 12-16
Flash Very Fast High 4-12
Successive Medium –
Low 8-16
Approx Fast
Sigma – Delta Slow Low 12-24
Successive Approximation Example

• 10 bit resolution or
0.0009765625V of Vref
• Vin= .6 volts
• Vref=1volts
• Find the digital value of
Vin
 Successive Approximation
• MSB (bit 9)
– Divided Vref by 2
– Compare Vref /2 with Vin
– If Vin is greater than Vref /2 , turn MSB on (1)
– If Vin is less than Vref /2 , turn MSB off (0)
– Vin =0.6V and V=0.5
– Since Vin>V, MSB = 1 (on)
 Successive Approximation
• Next Calculate MSB-1 (bit 8)
– Compare Vin=0.6 V to V=Vref/2 + Vref/4= 0.5+0.25 =0.75V
– Since 0.6<0.75, MSB is turned off
• Calculate MSB-2 (bit 7)
– Go back to the last voltage that caused it to be turned on (Bit 9)
and add it to Vref/8, and compare with Vin
– Compare Vin with (0.5+Vref/8)=0.625
– Since 0.6<0.625, MSB is turned off
 Successive Approximation
• Calculate the state of MSB-3 (bit 6)
– Go to the last bit that caused it to be turned on (In
this case MSB-1) and add it to Vref/16, and
compare it to Vin
– Compare Vin to V= 0.5 + Vref/16= 0.5625
– Since 0.6>0.5625, MSB-3=1 (turned on)
 Successive Approximation
• This process continues for all the remaining
bits.