14MTE02 EMBEDDED PROGRAMMING

FOR MECHATRONICS SYSTEMS

COURSE OUTCOMES
On completion of the course the students will be able to

CO1: interpret architecture and interfacing concepts of PIC18

microcontroller
CO2: develop embedded programming using PIC18 microcontrollers
CO3: interpret architecture and features of ATMEGA 8 microcontroller
CO4: build embedded programming using PIC18 microcontroller
CO5: design interfacing circuits for real time applications using PIC18
microcontroller
UNIT – I 9
PIC Microcontroller: Architecture of PIC 18 – Pin Description –
Memory organization: Program memory – Data Memory – I/O Ports –
Timers – Counters – Capture/ Compare /PWM mode – External Hardware
Interrupts– USART – ADC.

UNIT – II 9
PIC 18 Embedded C Programming: I/O ports: Register configuration–
programming – Timers: modes–programming – Counters – ADC:
configuration registers–programming – External Hardware Interrupts:
types–programming.

UNIT – III 9
I/O Interfacing using PIC 18 Microcontroller: Sensor interfacing –
LED interfacing – LCD interfacing – Motor interfacing – High power
devices using relays - Case studies: Automotive applications - Robotic
applications.
UNIT – IV 9
ATMEGA 8 Microcontroller: Architecture of ATMEGA 8 – Pin Description–.
Memory organization: Program memory – Data Memory - I/O Ports – Timers –
Counters – Analog comparator – Serial Peripheral Interface – USART – External
Hardware Interrupts – ADC.

UNIT – V 9
ATMEGA 8 Embedded C Programming: I/O ports: Register configuration–
programming – Timers: modes–programming – Counters – ADC: configuration
registers–programming – External Hardware Interrupts: types –programming.
TOTAL: 45
TEXT BOOKS:
1. Mazidi, Muhammad Ali, Mckinlay, Rolin D., and Causey Danny, “PIC Microcontroller and
Embedded Systems using Assembly and C for PIC 18”, Pearson Education Asia, 2015.
2. Data sheet – ATMEGA 8.
REFERENCE BOOKS:
1. Peatman John B., “Design with PIC Microcontrollers”, Pearson Education, New Delhi, 2009.
2. Valvano Jonathan W., “Embedded Microcomputer Systems: Real Time Interfacing”, 3 rd
Edition, Thomson Asia, Singapore, 2011.
3. Data sheet –PIC18FXXX.
4. http://nptel.ac.in/courses/101106041/
5. http://nptel.ac.in/downloads/108105057/
PIC18 Microcontroller

Basic Features
 Introduction

PIC: Peripheral Interface

Controller
Microchip Technology, USA at
1989
Single chip micro-controllers.
8-bit micro controllers: PIC 10xxx,
12xxx, 14xxx, 16xxx, 17xxx, 18xxx
CPU can access only 8 bit data. If
more than 8 bit, data has been
broken into 8 bit pieces and
processed by CPU
18 to 80 pin packages available
 Architecture
Von Neumann
Architecture
• Von Neumann Architecture:
– Fetches instructions and data
from a single memory space
– Limits operating bandwidth
8-bit Bus Program
& Data
Memory
CPU
• Harvard Architecture:
Harvard – Uses two separate memory
Architecture
spaces for program
instructions and data
8-bit Bus Data – Improved operating bandwidth
Memory
– Allows for different bus widths
16-bit Bus
CPU

Program
Memory
Simplified View
PIC 18 Microcontroller
(Harvard Architecture)
Features of the PIC18 microcontroller
 RISC Architecture
 8-bit CPU
 2 MB program memory space
 4 KB to 128KB flash program memory
 256 bytes to 1KB of data EEPROM
 Up to 3968 bytes of on-chip SRAM
 Sophisticated timer functions that include: input capture,
output compare, PWM, real-time interrupt, and watchdog
timer
 Serial communication interfaces: SCI, SPI, I2C, and CAN
 Background debug mode (BDM)
 10-bit A/D converter
 Memory protection capability
 Instruction pipelining
 Operates at up to 40 MHz crystal oscillator
 PIC 18 vs 8051

Features PIC18 8051

Architecture RISC CISC
Program ROM 2 MB 64 KB
Data RAM 4 K (4096 bytes) 256 bytes
Timers 4 3
I/O pins 33 (Vary based on 32
PIN packages)
Serial Port 1 1
ADC In built -
 PIC 18Fxx
Microcontroller
(Architecture)
PIC 18Fxx Microcontroller
(PDIP PIN Diagram)
PIC 18Fxx Microcontroller
(TQFP PIN Diagram)
PIC 18 Microcontroller
(MCU and Memory)
Arithmetic Logic Unit (ALU)
– WREG – working register
– Status register that stores flags
– Instruction decoder – when the instruction is fetched it goes into
the ID
Registers
– Bank Select Register (BSR)
• 4-bit register used in direct addressing the data memory
– File Select Registers (FSRs)
• 16-bit registers used as memory pointers in indirect addressing
data memory
– Program Counter (PC)
• 21-bit register that holds the program memory address while
executing programs
Control unit
– Provides timing and control signals to various Read and Write
operations
Address bus
– 21-bit address bus for program memory addressing capacity:
2 MB of memory
– 12-bit address bus for data memory addressing capacity: 4
KB of memory

Data bus
- 16-bit instruction/data bus for program memory
- 8-bit data bus for data memory
 PIC 18 Memory Organization
 Enhanced FLASH Program Memory
 Data Memory
 EEPROM Data Memory

 Data Memory and Program Memory are separated

 Separation of data memory and program memory makes possible the
simultaneous access of data and instruction.
 Data memory are used as general-purpose registers or special function
registers
 On-chip Data EEPROM are provided in some PIC18 MCUs
 PIC18 Data Memory
 Read / Write Memory
 Static RAM (SRAM)
 PIC18 MCU : 4096 bytes of data memory (000 – FFF H)
 Special Function Registers (SFR) – 128 bytes
• Dedicated to Special functions: ALU, Timer, SCI, ADC, I/O etc.
• Fixed Size and Control the operation of peripheral functions
 General Purpose Registers (GPR) - 3968 bytes
• Hold dynamic data
• Used for Data Manipulation (Storage and retrieval)
 Access bank
• Data memory is divided into banks
• No. of bytes in each bank : 256 bytes
• No. of banks : 4096 / 256 = 16 (not for all PIC)
• Only one bank is active at any time. The active bank is
specified by Bank Select Register (BSR)
• Bank switching is an overhead and can be error-prone. It is
reduced by Access bank
• Access bank consists of the lowest 128 bytes and the highest
128 bytes of the data memory space
 PIC18 Program Memory
 The program counter (PC) is 21-bit long, which enables the user
program to access up to 2 MB of program memory (2^21)
 The PIC18 has a 31-entry return address stack to hold the return
address for subroutine call
 After power-on, the PIC18 starts to execute instructions from
address 0
 The location at address 0x08 is reserved for high-priority interrupt
service routine
 The location at address 0x18 is reserved for low-priority interrupt
service routine
 Up to 128KB (at present time) of program memory is inside the
MCU chip
 Part of the program memory is located outside of the MCU chip
 PIC18 Program ROM

 Low bytes goes to low memory location & high bytes goes to high
memory location – Little Endian
 Low bytes goes to high memory location & high bytes goes to low
memory location – Big Endian
PIC18 CPU Registers
The group of registers
from 0xFD8 to 0xFFF
are dedicated to the
general control of
MCU operation.

The WREG register is

involved in the
execution of many
instructions.
 PIC18
STATUS
Registers
PIC18 Program Counter
 PIC18 Oscillator and Reset Circuit
Oscillator Modes: programmable by three configuration bits (FOSC2,
FOSC1, and FOSC0).
1. LP - Low Power Crystal
2. XT - Crystal/Resonator
3. HS - High Speed Crystal/Resonator
4. HS4 - High Speed Crystal/Resonator with PLL enabled
5. RC - External Resistor/Capacitor
6. RCIO - External Resistor/Capacitor with I/O pin enabled
7. EC - External Clock
8. ECIO - External Clock with I/O pin enabled

RESET Modes:
a) Power on Reset (POR)
b) MCLR Reset during normal operation
c) MCLR Reset during SLEEP
d) Watchdog Timer (WDT) Reset (during normal operation)
e) Programmable Brown-out Reset (PBOR)
f) RESET Instruction
g) Stack Full Reset
h) Stack Underflow Reset
HS, XT & LP Mode RC Mode

EC Mode

ECIO Mode
Power ON Reset Circuit

Oscillator and Reset Circuit

Power ON Reset Circuit

with Momentary Switch
I/O Ports
(Special Function Register)
 PIC18 Timers and Counters
 Timer 0, 1, 2, 3 and 4
 Every timer needs a clock pulse to tick. The clock source can be
internal or external.
 Internal clock: The 1/4th of the frequency of the crystal oscillator on
the OSC1 and OSC2 pins (Fosc/4) is fed into the timer. Therefore,
it is used for time delay generation – Timer
 External clock: Fed pulses thru’ one of the PIC18’s pins - Counter:
Count events happening outside the microcontroller.
 Many of the PIC18 timers are 16 bits wide: Each 16-bit timer is
accessed as two separate register, low byte (TMRxL) and high
byte (TMRxH)
 Each timer also has the TCON (Timer Control) register for setting
modes of operation
 Timer0 Module
• 8-bit or 16-bit Timer/Counter
• The 16-bit register of Timer0 is accessed as low byte
(TMR0L) and high byte (TMR0H)

• Readable and writable registers

• Dedicated 8-bit, software programmable prescaler
• Selectable clock source (internal or external)
• Edge select for external clock
• Interrupt-on-overflow
Timer0 Control Register (T0CON)

(RA4) – External clock (Counter)

(Fosc/4 from XTAL oscillator - Timer)
 Configuration of T0CON Register
• Configure T0CON if we want to program Timer0 in 16-bit
mode, no prescaller. Use PIC18’s Fosc/4 crystal
oscillator for the clock source, increment on positive-
edge.
T0CON = 0000 1000

• Configure T0CON if we want to program Timer0 in 16-bit

mode with 64 prescaller. Use PIC18’s Fosc/4 crystal
oscillator for the clock source, increment on negative-
edge.
T0CON = 0001 0101
 INTCON (Interrupt Control)
• TMR0IF Flag Bit

D7 D0
 Timer1 Module
• 16-bit timer or counter
• TMR1H:TMR1L

High byte (8-bit) Low byte (8-bit)

• PIR1 (Peripheral Interrupt Request Register 1)

D7
T1CON (Timer1 Control Register)
 Timer2 Module
• 8-Bit Timer
• Important Registers:
i) T2CON (Timer2 Control Register)
• To start & stop Timer2 and other configurations
ii) PR2 (to set the counting value)
• If TMR2 = PR2; TMR2IF flag is set
iii) PIR1 (Peripheral Interrupt Request Register 1)

D7
T2CON (Timer2 Control Register)
 Timer3 Module
• 16-bit timer or counter
• Important Registers:
i) T3CON (Timer3 Control Register)
• To start & stop Timer3 and other configurations
ii) TMR3H:TMR3L (for counting purposes)
• Act as counting buffer
iii) PIR2 (Peripheral Interrupt Request Register 2)
T3CON (Timer3 Control Register)
 CAPTURE/COMPARE/PWM (CCP)
MODULES
• Control register (CCPxCON)
• Data register (CCPRx) - two 8-bit registers
– CCPRxL (low byte)
– CCPRxH (high byte)
• CCP mode – Timer Resource
CCP1CON: CAPTURE/COMPARE/PWM CONTROL REGISTER
CCP1IF (PIR1 Register)
 Capture Mode

Timer register TMR1 (consisting of TMR1H and TMR1L) is copied to the

CCP1 register (consisting of CCPR1H and CCPR1L) in the following
situations:
• Every falling edge (1 » 0) on the RC2/CCP1 pin;
• Every rising edge (0 » 1) on the RC2/CCP1 pin;
• Every 4th rising edge (0 » 1) on the RC2/CCP1 pin;
• Every 16th rising edge (0 » 1) on the RC2/CCP1 pin.
 Compare Mode

When a match occurs, the CCP1 pin can be:

• driven high
• driven low
• toggled (high-to-low or low-to-high)
• remain unchanged (that is, reflects the state of the I/O latch)
• Configure CCP1CON register value for compare mode if
we want to toggle the CCP1 pin upon match (=0x02)

• Configure T3CON register value if we want to used

Timer 3 for compare mode of CCP1 with no prescalar
(=0x42)

• Configure CCP1CON register value for capture mode if

we want to compare on the rising edge of every pulse
(=0x03)

• Configure T3CON register value if we want to used

Timer 3 for capture mode of CCP1 with no prescalar
(=0x42)
 PWM Mode
A PWM output has a time base (period) and a time that the output stays
high (duty cycle). The frequency of the PWM is the inverse of the
period (1/period).

PWM Period = [(PR2) + 1] x 4 x TOSC x TMR2 Prescale Value

where, PR2 = [(Fosc) / (Fpwm x 4 x TMR2 Prescale Value)] – 1

Tosc = 1/ Fosc

PWM Duty Cycle = (CCPR1L:CCP1CON<5:4>) x TOSC x (TMR2 Prescale Value)

 Desired PWM Period
PWM Period (Tpwm)= [(PR2) + 1] x 4 x TOSC x TMR2 Prescale Value

where, PR2 = [(Fosc) / (Fpwm x 4 x TMR2 Prescale Value)] – 1

Tosc = 1/ Fosc

E.g.: Fpwm = 1.22 kHz ; XTAL = 20 MHz;

PR2 = [ (20 x 106) / (1.22 x 103 x 4) ] – 1 = 4097 --------- No prescalar

PR2 = [ (20 x 106) / (1.22 x 103 x 4 x 16) ] – 1 = 255 --------- 1:16 prescalar

Tpwm = [255 + 1] x 4 x (1/ (20 x 106)) x 16 = 0.82 ms

 Duty Cycle of PWM Period
• CCP module use 10 bit register for duty cycle (DC1B9:Dc1B0)
• Upper 8 bits from CCPR1L register
• Lower 2 bits from CCP1CON register (Used for decimal point)
DC1B1 DC1B0 Decimal value
0 0 0
0 1 0.25
1 0 0.5
1 1 0.75

E.g: PR2 = 50 ; Duty cycle = 25 % required

CCPR1L = 25 % X 50 = 12.5
CCPR1L = 12 = 0000 1100 = 0 x 0C;
DC1B1 : DC1B0 = 0.5 = 1 0
PWM BLOCK DIAGRAM
Compute the values of PR2, CCPR1L and
DC1B1:DC1B0 registers for Fpwm = 2.5 kHz if the
required duty cycle is 75 %. Assume XTAL = 10
MHZ and 1:4 prescalar

Result :
PR2 = 249
CCPR1L = 1011 1010
DC1B1:DC1B0 = 1 1
 PIC18 Interrupts
• Interrupts are mechanisms which enable instant
response to events such as counter overflow,
pin change, data received, etc.
• In normal mode, microcontroller executes the
main program as long as there are no
occurrences that would cause an interrupt
• Upon interrupt, microcontroller stops the
execution of main program and commences the
special part of the program(ISR) which will
analyze and handle the interrupt
Polling
– PIC continuously monitors the status of each device
– Each device get the attention of the CPU as the same
level of priority
– Wastes Microcontrollers time by polling devices that do
not need service

Interrupt
– Devices get the attention of the CPU only when it needs
a service
– Can service many devices with different level of
priorities
 Interrupt service routine (ISR)
• When an interrupt is
invoked, the microcontroller
runs the Interrupt Service
Routine(ISR)
• Interrupt vector table holds
the address of ISRs
– Power-on Reset: 0000h
– High priority interrupt :0008h
– Low priority interrupt: 0018h
 Steps in executing an interrupt
• Finish the executing instruction, and save the
address of the next instruction (program
counter) on the stack
• Jump to a fixed location by interrupt vector table
which directs the address of ISR
• Execute the ISR until reach RETFIE (return from
interrupt exit)
• Get PC from stack and return to the place where
it was interrupted

11-70
 Sources of interrupts in PIC18
• External hardware interrupts :RB0(INT0),
RB1(INT1), RB2(INT2)
• PORTB change interrupts (any one of the upper
four Port B pins)
• Timer interrupts :Timer0 , Timer1 ,Timer2
• ADC (analog to digital converter)
• CCP (compare capture pulse width modulation,
PWM)
• Serial communication’s USART interrupts:
receive and transmit, respectively
11-71
Sources of interrupts in PIC18
INTCON
Register
• The switch is connected to the pin RB0 (INT0)
and an LED is connected to the pin RB7. Write
C18 program, every time INT0 is activated, it
toggles LED, while at the same time data is being
transferred from PORTC to PORTD.

• The pulse generator is connected to the pin RB1

(INT1) and an LED is connected to the pin RB7.
Write C18 program, every time INT1 is activated,
it toggles the LED on the falling edge of the
pulse, while at the same time data is being
transferred from PORTC to PORTD.
 PIC 18 Microcontroller

Universal Synchronous
Asynchronous Receiver and
Transmitter (USART)
 Basics of Serial Communication
• Computers transfer data in two ways: Parallel and Serial.
• Parallel: Eight or more data lines, few feet only, short
time
• Serial: Single data line, long distance
• The byte of data must be converted to serial bits using a
parallel-in-serial-out shift register

Serial versus Parallel Data Transfer

• The receiving end must be a serial-in-
parallel-out shift register and pack them into
a byte.
• Two methods of serial data communication:
Asynchronous and Synchronous

Transfers a block
Transfers a single of data at a time
byte at a time
Half-and Full-Duplex Transmission
 Start and Stop Bits
• In the asynchronous method, each
character is placed between start and stop
bits (framing)

MSB LSB

Framing ASCII ‘A’ (41H)

 Data Transfer Rate
• Rate of data transfer: bps (bits per second)
• Another widely used terminology for bps is
baud rate
• For Asynchronous serial data
communication, the baud rate is generally
limited to 100,000bps

10-82
• USART has both
– Synchronous
– Asynchronous
• 6 registers
– SPBRG
– TXREG
– RCREG
– TXSTA
– RCSTA
– PIR1
 SPBRG Register and Baud Rate
• The baud rate in is programmable
• loaded into the SPBRG decides the baud rate

• Depend on crystal frequency

 Baud rate Formula

If Fosc = 10MHz
X = (156250/Desired Baud Rate) - 1
Example:

Desired baud rate = 1200, Clock Frequency =

10MHz

X = (156250/1200) – 1
X = 129.21 = 129 = 81H
 TXREG Register
• 8-bit register used for serial communication
• For a byte of data to be transferred via the
Tx pin, it must be placed in the TXREG
register first.
• The moment a byte is written into TXREG,
it is fetched into a non-accessible register
TSR (Transmit Shift Register)
• The frame contains 10 bits including
START and STOP bits
 RCREG Register
• 8-bit register used for serial communication

• When the bits are received serially via the

Rx pin, the PIC18 deframes them by
eliminating the START and STOP bit,
making a byte out of data received and
then placing it in the RCREG register
 TXSTA
(Transmit Status and Control Register)

10-89
 RCSTA
(Receive Status and Control Register)

10-91
 PIR1
(Peripheral Interrupt Request Register 1)

10-93
 Simplified USART
Transmit Block Diagram
 PIC 18 Microcontroller
Analog to Digital Converter
(ADC)
Vref

Analog Input (Vin)

PIC18 Digital Input

(10 –bit ADC) (D0 – D9)
Start Conversion
 Major Characteristics of ADC
• Resolution (n = 8, 10, 12, 16 and 24 bits)
• Step Size = Vref / No. of steps (2n)
• Conversion Time
• Reference voltage (Vref)
• Digital data output (Dout)
Dout = Vin / Step Size
E.g:- 8 bit ADC; Vref=2.56V; Vin=1.7V
Dout = 170 = 10101010
• Analog input channels (5 to 15 ADC channels)
• Start conversion and end of conversion signals
ADCON0: A/D CONTROL REGISTER 0
ADCON1: A/D CONTROL REGISTER 1
ADC Block Diagram
 Features of ADC
• 10 bit ADC
• 5 to 15 channels (RA0 – RA7)
• Output binary data is held by ADRESL and
ADRESH
• Vref = Vdd
• Vref = Vref (+) – Vref(-)
• Conversion time is dictated by Fosc (40MHz)
• Conversion time per bit = 1.6 micro second