بسم هللا الرحمن الرحيم
Faculty of Engineering
Dept. of Electrical & Electronics Engineering
Microprocessor Systems Design (EEE 42101)
Lec (3)
8051 Microcontrollers
Pin-layout, Addressing Modes, and Interrupts
8051 Pin: 40 – pin Dual In-line Package (DIP).
40 – pin DIP IC,
each side contains 20 Pins
Pins 1 – 8 (PORT 1):
8 – bit bidirectional I/O Port
Pin 9 (RST):
Pin 9 is the Reset Input Pin.
It is an active HIGH Pin
Pins 10 – 17 (PORT 3):
form the PORT 3 pins,
a bidirectional I/O PORT.
P3 have special functions
8051 Pin: 40 – pin Dual In-line Package (DIP).
Port3 have special functions
PORT 3 Functio
Description
Pin n
P3.0 RXD Serial Input
P3.1 TXD Serial Output
P3.2 INT0 Exter. Interrupt 0
P3.3 INT1 Exter. Interrupt 1
P3.4 T0 Timer 0
P3.5 T1 Timer 1
Exter. Memory
P3.6 WR Write
P3.7 RD Exter. Memory Read
Pins 18 & 19:. XTAL 2 and
XTAL 1
for connecting external oscillator.
Pin 20 (GND): is the Ground Pin
8051 Pin: 40 – pin Dual In-line Package (DIP).
Pins 21 – 28 (PORT 2):
Bidirectional I/O Port
when external memory is
interfaced, PORT 2 pins act as
the higher order address
byte.
Pin 29 (PSEN):
Program Store Enable (PSEN).
Exter. Program Memory can be read.
Pin 30 (ALE/PROG):
Address Latch Enable.
external address can be separated
from data (they are multiplexed).
8051 Pin: 40 – pin Dual In-line Package (DIP).
Pin 31 (EA/VPP):
1. External Access Enable.
2. allows external Program Memory.
External Program Memory
1. can be fetched if this pin is LOW.
Pins 32 – 39 (PORT 0):
bidirectional Input / Output
acts as lower order address/data
when external memory is accessed
Pin 40 (VCC):
supply voltage is given (+5V).
8051 Pin: 40 – pin Dual In-line Package (DIP)
8051 Addressing Modes
There are a number of addressing modes available to the
8051 instruction set, as follows:
Immediate Addressing Relative Addressing
Register Addressing Absolute addressing
Direct Addressing Long Addressing
Indirect Addressing Indexed Addressing
Immediate addressing simply means that the
operand is the data value to be used. For
example the instruction:
One of the eight general-registers, R0 to R7, can be
specified as the instruction operand.
Documentation refers to a register generically as Rn. An
example instruction using register addressing is :
Here the contents of R5 is added to the accumulator.
One advantage of register.
Addressing is that the instructions tend to be short,
single byte instructions.
Direct addressing means that the data value is obtained
directly from the memory location specified in the
operand. For example consider the instruction
The instruction reads the data from Internal RAM
address 47h and stores this in the accumulator.
Direct addressing can be used to access Internal RAM ,
including the SFR registers.
Indirect addressing provides a powerful addressing
capability, which needs to be appreciated. An example
instruction, which uses indirect addressing, is as follows:
Note the @ symbol indicated that the indirect addressing
mode is used.
R0 contains a value, for example 54h, which is to be used as
the address of the internal RAM
Absolute addressing
Long Addressing
Indexed Addressing
Interrupts Services 8051
There are five interrupt sources for the 8051:
It can recognize 5 different events that can interrupt
regular program execution.
Each interrupt can be enabled or disabled by setting
bits of the IE register.
the whole interrupt system can be disabled by
clearing the EA bit of the same register.
External interrupts- INT0 and INT1:
If the IT0 and IT1 bits of the TCON register are set, an
interrupt will be generated on high to low transition,
i.e. on the falling pulse edge (only in that moment).
EA - global interrupt enable/disable:
0 - disables all interrupt requests.
1 - enables all individual interrupt requests.
ES - enables or disables serial interrupt:
0 - UART system cannot generate an interrupt.
1 - UART system enables an interrupt.
ET1 - bit enables or disables Timer 1 interrupt:
0 - Timer 1 cannot generate an interrupt.
1 - Timer 1 enables an interrupt.
EX1 - bit enables or disables external 1 interrupt:
– 0 - change of the pin INT0 can not generate an interrupt.
– 1 - enables an external interrupt on the pin INT0
ET0 - bit enables or disables timer 0 interrupt:
– 0 - Timer 0 cannot generate an interrupt.
– 1 - enables timer 0 interrupt.
EX0 - bit enables or disables external 0 interrupt:
– 0 - change of the INT1 pin cannot generate interrupt.
– 1 - enables an external interrupt on the pin INT1
• If several interrupts are enabled, it may happen that while
one of them is in progress, another one is requested.
• In order that the microcontroller knows whether to continue
operation or meet a new interrupt request, there is a priority
list instructing it what to do.
The priority list offers 3 levels of interrupt priority:
Reset! The absolute master. When a reset request arrives,
everything is stopped and the microcontroller restarts.
Interrupt priority 1 can be disabled by Reset only.
Interrupt priority 0 can be disabled by both Reset and
interrupt priority 1.
