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Intorduction

The document discusses digital system design and very-large-scale integration (VLSI). It covers topics like Moore's law, the VLSI design process involving multiple levels of abstraction, challenges in VLSI design like dealing with complexity, and manufacturing testing.

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0% found this document useful (0 votes)
38 views31 pages

Intorduction

The document discusses digital system design and very-large-scale integration (VLSI). It covers topics like Moore's law, the VLSI design process involving multiple levels of abstraction, challenges in VLSI design like dealing with complexity, and manufacturing testing.

Uploaded by

sushil@ird
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPT, PDF, TXT or read online on Scribd
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Digital System Design

References:
1. Wolf, Wayne, Modern VLSI Design-System on Silicon,
Fourth Edition, Pearson
2. Comer,David J. Digital Logic State Machine Design,
Third Edition, Oxford University Press
3. Ashenden, Peter J., The Student’s Guide to VHDL,
Morgan Kaufman

By: Prakshet Thapa


BE(Elx.&Comm.)2002,PU
M. Sc.(ICE) IOE,2007, TU
[email protected], [email protected]
Mob:9851144444

1
Overview
 Introduction
 Why VLSI?
 Moore’s Law.
 The VLSI design process.

2
IC
 an integrated circuit also known as IC,
microcircuit, microchip, silicon chip, or
chip
 consisting mainly of semiconductor devices,
as well as passive components
 manufactured in the surface of a thin
substrate of semiconductor material.
 Integrated circuits are used in almost all
electronic equipment in use today and have
revolutionized the world of electronics

3
Generations
SSI, MSI and LSI
 Small-Scale Integration (SSI): digital
circuits containing transistors numbering in
the tens provided a few logic gates(1960)
 Medium-Scale Integration (MSI):
devices which contained hundreds of
transistors on each chip(late 1960s)
 Large-Scale Integration (LSI):
in the mid 1970s, with tens of thousands of
transistors per chip

4
VLSI
 very large-scale integration
 The final step in the development process
 Starting in the 1980s and continuing
through the present
 The development started with hundreds of
thousands of transistors in the early 1980s,
and continues beyond several billion
transistors as of 2009.

5
ULSI, WSI, SOC and 3D-IC

 ULSI that stands for "ultra-large-scale integration" was


proposed for chips of complexity of more than 1 million
transistors
 Wafer-scale integration (WSI) is a system of building
very-large integrated circuits that uses an entire silicon
wafer to produce a single "super-chip".
 A system-on-a-chip (SoC or SOC) is an integrated
circuit in which all the components needed for a
computer or other system are included on a single
chip.
 A three-dimensional integrated circuit (3D-IC) has two
or more layers of active electronic components that are
integrated both vertically and horizontally into a single
circuit.

6
Why VLSI?
 Integration improves the design:
 lower parasitics = higher speed;
 lower power;
 physically smaller.
 Integration reduces manufacturing
cost-(almost) no manual assembly.

7
VLSI and you
 Microprocessors:
 personal computers;
 microcontrollers.
 DRAM/SRAM.
 Special-purpose processors.

8
Moore’s Law
 Gordon Moore: co-founder of Intel.
 Predicted that number of transistors
per chip would grow exponentially
(double every 18 months).
 Exponential improvement in
technology is a natural trend: steam
engines, dynamos, automobiles.

9
Moore’s Law plot

10
The cost of fabrication
 Current cost: $2-3 billion.
 Typical fab line occupies about 1 city
block, employs a few hundred people.
 Most profitable period is first 18
months-2 years.

11
Cost factors in ICs
 For large-volume ICs:
 packaging is largest cost;
 testing is second-largest cost.
 For low-volume ICs, design costs may
swamp all manufacturing costs.

12
The VLSI design process
 Major levels of abstraction:
 specification;
 architecture;
 logic design;
 circuit design;
 layout.

13
Challenges in VLSI design
 Multiple levels of abstraction:
transistors to CPUs.
 Multiple and conflicting constraints:
low cost and high performance are
often at odds.
 Short design time: Late products are
often irrelevant.

14
Dealing with complexity
 Divide-and-conquer: limit the number
of components you deal with at any
one time.
 Group several components into larger
components:
 transistors form gates;
 gates form functional units;
 functional units form processing elements;
 etc.
15
Hierarchical name
 Interior view of a component:
 components and wires that make it up.
 Exterior view of a component = type:
 body;
 pins. cout

sum
a Full
adder
b
cin
16
Instantiating component types
 Each instance has its own name:
 add1 (type full adder)
 add2 (type full adder).
 Each instance is a separate copy of
the type:
cout Add2.a
Add1.a
sum sum
a Add1(Full a Add2(Full
adder) adder)

b b
cin cin
17
A hierarchical logic design

box1 box2 x

z
18
Component hierarchy

top

i1 xxx i2

19
Layout and its abstractions
 Layout for dynamic latch:

20
Stick diagram

21
Transistor schematic

22
Mixed schematic

inverter

23
Levels of abstraction
 Specification: function, cost, etc.
 Architecture: large blocks.
 Logic: gates + registers.
 Circuits: transistor sizes for speed,
power.
 Layout: determines parasitics.

24
Circuit abstraction
 Continuous voltages and time:

25
Digital abstraction
 Discrete levels, discrete time:

26
Register-transfer abstraction
 Abstract components, abstract data types:

0010
+
0001
+ 0011

0100

27
Top-down vs. bottom-up design
 Top-down design adds functional
detail.
 Create lower levels of abstraction from
upper levels.
 Bottom-up design creates
abstractions from low-level behavior.
 Good design needs both top-down
and bottom-up efforts.

28
Design abstractions
English specification
Executable Throughput,
program behavior design time

register- Function units,


function Sequential clock cycles cost
transfer
machines
Literals,
Logic gates logic logic depth

transistors circuit nanoseconds

rectangles layout microns


29
Design validation
 Must check at every step that errors
haven’t been introduced-the longer
an error remains, the more expensive
it becomes to remove it.
 Forward checking: compare results of
less- and more-abstract stages.
 Back annotation: copy performance
numbers to earlier stages.

30
Manufacturing test
 Not the same as design validation:
just because the design is right
doesn’t mean that every chip coming
off the line will be right.
 Must quickly check whether
manufacturing defects destroy
function of chip.
 Must also speed-grade.

31

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