EC8392

DIGITAL
ELECTRONICS
 OBJECTIVES
 To present the Digital fundamentals, Boolean algebra
and its applications in digital systems
 To familiarize with the design of various combinational
digital circuits using logic gates
 To introduce the analysis and design procedures for
synchronous and asynchronous sequential circuits
 To explain the various semiconductor memories and
related technology
 To introduce the electronic circuits involved in the
making of logic gates
 SYLLABUS

UNIT I DIGITAL FUNDAMENTALS 9

Number Systems – Decimal, Binary, Octal, Hexadecimal, 1‘s and 2‘s complements,
Codes – Binary, BCD, Excess 3, Gray, Alphanumeric codes, Boolean theorems, Logic
gates, Universal gates, Sum of products and product of sums, Minterms and Maxterms,
Karnaugh map Minimization and Quine-McCluskey method of minimization.

UNIT II COMBINATIONAL CIRCUIT DESIGN 9

Design of Half and Full Adders, Half and Full Subtractors, Binary Parallel Adder –
Carry look ahead Adder, BCD Adder, Multiplexer, Demultiplexer, Magnitude
Comparator, Decoder, Encoder, Priority Encoder.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS 9

Flip flops – SR, JK, T, D, Master/Slave FF – operation and excitation tables, Triggering of FF, Analysis

and design of clocked sequential circuits – Design – Moore/Mealy models, state minimization, state

assignment, circuit implementation – Design of Counters- Ripple Counters, Ring Counters, Shift

registers, Universal Shift Register.

UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS 9

Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments,

Hazards, Essential Hazards, Pulse mode sequential circuits, Design of Hazard free circuits.

UNIT V MEMORY DEVICES AND DIGITAL INTEGRATED CIRCUITS 9

Basic memory structure – ROM -PROM – EPROM – EEPROM –EAPROM, RAM – Static and dynamic

RAM – Programmable Logic Devices – Programmable Logic Array (PLA) – Programmable Array Logic

(PAL) – Field Programmable Gate Arrays (FPGA) – Implementation of combinational logic circuits

using PLA, PAL.

Digital integrated circuits: Logic levels, propagation delay, power dissipation, fan-out and fan-in, noise

margin, logic families and their characteristics-RTL, TTL, ECL, CMOS

DIGITAL
0’s & 1’S
Analog Signal
• An analog signal is a
continuous wave denoted by a
sine wave and may vary in
signal strength (amplitude) or
frequency (time).

Digital Signal
• A digital signal - a must for
computer processing - is
described as using binary (0s
The red digital signal is the sampled and
and 1s), rounded representation of the grey analog
signal. A digital signal consists of a sequence of
samples, which in this case are integers: 4, 5, 4,
3, 4, 6….
 Binary Digital Signal
• An information variable represented by physical quantity.
• For digital systems, the variable takes on discrete values.
– Two level, or binary values are the most prevalent
values.
• Binary values are represented abstractly by:
– Digits 0 and 1
– Words (symbols) False (F) and True (T) V(t)
– Words (symbols) Low (L) and High (H)
– And words On and Off Logic 1

• Binary values are represented by values undefine

or ranges of values of physical quantities.
Logic 0
t
Binary digital signal
7
 Modem
• Within a communications environment, a modem is a
combination of two networking devices:
• These devices perform modulation and demodulation
algorithms simultaneously,
• To convert a signal from analog-to-digital and digital-to-
analog,
• Enabling data transmission to and from various computing
resources.
 Everything
Changing to DIGITAL

WHY?
 ADVANTAGES

 More Accurate
 Low power
 Less Loss
 High transmission speed
 No Noise
REAL TIME EXAMPLES
REAL TIME EXAMPLES
 UNIT-I
BOOLEAN ALGEBRA AND
LOGIC GATES
• Number Systems
• Arithmetic Operations
• Binary Codes
• Boolean Algebra & Theorems
• Boolean Functions
• Canonical and Standard Forms
• Karnaugh Map
• Quine-Mc Cluskey Method of Minimization
 What is Number System ?

A system for representing number of certain type.

Example:
–There are several systems for representing the counting numbers
– These include the usual base “10” or decimal system : 1,2,3 ,
…..10,11,12,..99,100,…
Basics of Number Systems
 Number System
•• Integers are normally written using positional number system, in which
 
each digit represents the coefficient in a power series

Where is the number of digit, is the radix or base and is the coefficient

Ex.
4 3 2 1 0
97142= 9*10 +7 *10 +1 *10 +4*10 +2 *10
There are four systems of arithmetic which are often used in digital circuits.
These systems are:
• decimal: it has a base (=10) and coefficients are in the range 0 to 9
• binary: it has a base (=2) and coefficients are all either 0 or 1
• octal : it has a base (=8) and coefficients are in the range 0 to 7
• Hexadecimal: it has a base (=16) and coefficients are in the range
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }

16
 Decimal Number System

• Base (also called radix) = 10

– 10 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }
• Digit Position
2 1 0 -1 -2
– Integer & fraction
• Digit Weight 5 1 2 7 4
– Weight = (Base) Position
100 10 1 0.1 0.01
• Magnitude
– Sum of “Digit x Weight”
• Formal Notation 500 10 2 0.7 0.04

d2*B2+d1*B1+d0*B0+d-1*B-1+d-2*B-2
5 *102+1 *101+2 *100+7 *10-1+4 *10-2

(512.74)10
17
 Binary Number System
• Base = 2
– 2 digits { 0, 1 }, called binary digits or “bits”
• Weights
– Weight = (Base) Position 4 2 1 1/2 1/4
• Magnitude 1 0 1 0 1
– Sum of “Bit x Weight”
2 1 0 -1 -2
• Formal Notation
1 *22+0 *21+1 *20+0 *2-1+1 *2-2
• Groups of bits 4 bits = Nibble
8 bits = Byte =(5.25)10

(101.01)2
1011

11000101
18
 Octal Number System
• Base = 8
– 8 digits { 0, 1, 2, 3, 4, 5, 6, 7 }
• Weights
64 8 1 1/8 1/64
Position
– Weight = (Base)
5 1 2 7 4
• Magnitude
2 1 0 -1 -2
– Sum of “Digit x Weight”
• Formal Notation 5 *82+1 *81+2 *80+7 *8-1+4 *8-2

=(330.9375)10
(512.74)8

19
 Hexadecimal Number System

• Base = 16
– 16 digits { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F }
• Weights 256 16 1 1/16 1/256

– Weight = (Base) Position 1 E 5 7 A

• Magnitude 2 1 0 -1 -2
– Sum of “Digit x Weight” 1 *162+14 *161+5 *160+7 *16-1+10 *16-2
• Formal Notation
=(485.4765625) 10

(1E5.7A)16

20
COMMON NUMBER SYSTEM
 Number Base Conversions

Evaluate
Magnitude Octal
(Base 8)

Evaluate
Magnitude
Decimal Binary
(Base 10) (Base 2)

Hexadecimal
Evaluate (Base 16)
Magnitude
22
 Decimal (Integer) to Binary Conversion
• Divide the number by the ‘Base’ (=2)
• Take the remainder (either 0 or 1) as a coefficient
• Take the quotient and repeat the division

Example: (13)10
Quotient Remainder Coefficient
13 / 2 = 6 1 a0 = 1
6 /2= 3 0 a1 = 0
3 /2= 1 1 a2 = 1
1 /2= 0 1 a3 = 1
Answer: (13)10 = (a3 a2 a1 a0)2 = (1101)2

MSB LSB
23
Decimal (Integer) to Binary Conversion

24
 Decimal (Fraction) to Binary Conversion

• Multiply the number by the ‘Base’ (=2)

• Take the integer (either 0 or 1) as a coefficient
• Take the resultant fraction and repeat the division

Example: (0.625)10
Integer Fraction Coefficient
0.625 * 2 = 1 . 25 a-1 = 1
0.25 * 2 = 0 . 5 a-2 = 0
0.5 *2= 1 . 0 a-3 = 1

Answer: (0.625)10 = (0.a-1 a-2 a-3)2 = (0.101)2

MSB LSB
25
Decimal to Binary Conversion

26
 Table of binary equivalent decimal numbers

Decimal Binary Decimal Binary Decimal Binary

1 1 11 1011 21 10101
2 10 12 1100 22 10110
3 11 13 1101 23 10111
4 100 14 1110 24 11000
5 101 15 1111 25 11001
6 110 16 10000 26 11010
7 111 17 10001 27 11011
8 1000 18 10010 28 11100
9 1001 19 10011 29 11101
10 1010 20 10100 30 11110
27
 Decimal to Octal Conversion
Example: (175)10
Quotient Remainder Coefficient
175 / 8 = 21 7 a0 = 7
21 / 8 = 2 5 a1 = 5
2 /8= 0 2 a2 = 2
Answer: (175)10 = (a2 a1 a0)8 = (257)8

Example: (0.3125)10
Integer Fraction Coefficient
0.3125 * 8 = 2 . 5 a-1 = 2
0.5 *8= 4 . 0 a-2 = 4
Answer: (0.3125)10 = (0.a-1 a-2 a-3)8 = (0.24)8

28
 Decimal to Hexadecimal Conversion
Example: (1983)10
Quotient Remainder Coefficient
1983 / 16 = 123 15 a0 = F
123 / 16 = 7 11 a1 = B
7 / 16 = 0 7 a2 = 7
Answer: (1983)10 = (a2 a1 a0)16 = (7BF)16

Example: (0.5625)10
Integer Fraction Coefficient
0.5625 *16 = 9 . 0 a-1 = 9

Answer: (0.5625)10 = (0.a-1 a-2 a-3)16 = (0.9)16

29
 Binary − Octal Conversion
Octal Binary
• 8 = 23
• Each group of 3 bits represents an octal 0 000
digit 1 001
2 010
Example: Assume
3 011
Zeros
( 1 0 1 1 0 . 0 1 )2 4 100
5 101
6 110
( 2 6 . 2 )8 7 111

Works both ways (Binary to Octal & Octal to Binary)

30
 Binary − Hexadecimal Conversion
Hex Binary
• 16 = 24 0 0000
1 0001
• Each group of 4 bits represents a 2 0010
3 0011
hexadecimal digit 4 0100
5 0101
Assume Zeros 6 0110
Example: 7 0111
8 1000
( 1 0 1 1 0 . 0 1 )2 9 1001
A 1010
B 1011
C 1100
D 1101
(1 6 . 4 )16 E 1110
F 1111

Works both ways (Binary to Hex & Hex to Binary)

31
 Octal − Hexadecimal Conversion

• Convert to Binary as an intermediate step

Example:
( 2 6 . 2 )8
Assume Zeros
Assume Zeros

( 0 1 0 1 1 0 . 0 1 0 )2

(1 6 . 4 )16

Works both ways (Octal to Hex & Hex to Octal)

32
 ARITHMETIC OPERATIONS

• Binary Addition
• Binary Subtraction [1’s Complement & 2’s Complement]
• Binary Multiplication
• Binary Division
 Binary Arithmetic
• Binary Addition:

1
10001001
+10010101
100011110
34
 Binary Addition
Column Addition
1 1 1 1 1 1 Carry
1 1 1 1 0 1 = 61
+ 1 0 1 1 1
= 23
1 0 1 0 1 0 0 = 84

Decimal Binary
≥ (2)10
1 1
0 + 0=0 0 + 1=1
2 10
3 11 1 + 0=1 1 + 1=0 with a carry of 1 or =10
35
Binary Subtraction:

36
 Binary Subtraction
• Borrow a “Base” when needed
1 2 = (10)2
0 2 2 0 0 2
1 0 0 1 1 0 1 = 77
− 1 0 1 1 1 = 23

0 1 1 0 1 1 0 = 54

37
• Binary Multiplication:

38
 Binary Multiplication
• Bit by bit
1 0 1 1 1
x 1 0 1 0
0 0 0 0 0
1 0 1 1 1
0 0 0 0 0
1 0 1 1 1

1 1 1 0 0 1 1 0
39
• Binary Division:

40
 COMPLEMENTS
Complements are used to represent negative numbers and also used in
digital computers for simplifying the subtraction operation and for
logical manipulation. There are two types of complements:
1’s complement
2’s complement

• For binary numbers, r(base) = 2

2’s complement
1’s complement

• For decimal numbers, r(base) = 10

10’s complement
9’s complement
41
• 1’s Complement

• 2’s Complement = [1’s complement+1]

42
SUBTRACTION USING 1’s COMPLEMENT:

• To Perform X-Y: [ X-Y = X + (-Y) ]

Step1:
Obtain 1’s Complement of Y and add with X
(i.e.) X + (1’s complement of Y)
Step2:

• If carry occur add it with the result ( end around carry)

• If No carry The answer is the 1’s complement of the result and add
the negative sign to the result.

43
44
SUBTRACTION USING 2’s COMPLEMENT:

• To Perform X-Y: [ X-Y = X + (-Y) ]

Step1:
Obtain 2’s Complement of Y and add with X
(i.e.) X + (2’s complement of Y)
Step2:

• If carry occur Discard it.

• If No carry The answer is the 2’s complement of the result and is
negative.

45
46
BINARY CODES

47
WEIGHTED CODES:
• Weighted binary codes obey their positional weighting principles. Each digit
position of a number represents a specific weight. The bits are multiplied by the
weights and the sum of these weighted bits give the equivalent decimal value.

48
WEIGHTED CODES CONT..

49
NON WEIGHTED CODES:
Non-weighted codes are codes that are not positionally weighted, The
non-weighted codes are: Excess-3 Code and Gray Code
EXCESS-3 CODE:

50
NON WEIGHTED CODES CONT….

51
NON WEIGHTED CODES CONT….

52
 ALPHANUMERIC CODES
• Alphanumeric codes are used to represent numbers, letters and other
special features using binary bits. The alphanumeric codes are
encoding the following:
• Decimal digits (0 to 9)
• Alphabetic characters (A to Z and a to z)
• Mathematical symbols
• Special control characters (like, ESC, NUL, ACK)
The alphanumeric codes are,
 ASCII Code,
 EBCDIC Code,
 Hollerith Code.

53
54
55
56
 When the digital information in the binary form is transmitted
from one circuit or system to another circuit or system an error
may occur
 This means the signal corresponding to 0 may change to 1 or
vice-versa due to presence of noise
 To maintain data integrity between transmitter and receiver,
extra bit or more than one bit are added in the data
 These extra bits allow the detection and sometimes the
correction of error in the data
 The data along with the extra bit /bits form the code
 Codes which allow only error detection are called error
detecting codes and codes which allow error detection and
correction are called error detecting and correcting codes
 PARITY BIT
 A parity bit is used for the purpose of detecting errors during
transmission of binary information
 A parity bit is an extra bit included with a binary message to
make the number of 1s either odd or even
 The message including the parity bit is transmitted and then
checked at the receiving end for errors
 An error is detected if the checked parity does not correspond
with the one transmitted
 The circuit that generates the parity bit in the transmitter is
called a parity generator and the circuit that checks the parity
in the receiver is called a parity checker
• In even parity the added parity bit will make the total number
of 1s an even amount. In odd parity the added parity bit will
make the total number of 1s an odd amount
• As a general rule in the digital system where the transmission
system is relatively short, it may be assumed that probability
of a single-bit error is small and that of a double-bit error and
higher order errors is extremely small.
 EVEN & ODD PARITY CODES

Binary Code Even Parity Even Parity Binary Code Odd Parity Odd Parity
bit Code bit Code
000 0 0000 000 1 0001
001 1 0011 001 0 0010
010 1 0101 010 0 0100
011 0 0110 011 1 0111
100 1 1001 100 0 1000
101 0 1010 101 1 1011
110 0 1100 110 1 1101
111 1 1111 111 0 1110
 More about logic gates
• To implement a logic gate in hardware, you use a transistor
• Transistors are all enclosed in an “IC”, or integrated circuit
• The current Intel Pentium IV processors have 55 million
transistors!

61
 Basic Logic Gates
and Basic Digital Design
• NOT, AND, and OR Gates
• NAND and NOR Gates
• Exclusive-OR (XOR) Gate
• Multiple-input Gates
 NOT Gate -- Inverter

X Y
0 1
1 0
Circuit Symbol Truth Table Boolean Expression
 NOT
• Y = ~X (Verilog)
• Y = !X (ABEL)
• Y = not X (VHDL)
• Y = X’
• Y = X
• Y = X (textook)
• not(Y,X) (Verilog)
 NOT

X ~X ~~X = X

X ~X ~~X
0 1 0
1 0 1
 AND Gate

AND
X Y Z
X 0 0 0
Z 0 1 0 Z = X & Y
1 0 0
Y
1 1 1

Circuit Symbol Truth Table Boolean Expression

 AND

• X&Y (Verilog and ABEL)

• X and Y (VHDL)
• X Y
• X Y
V
• X*Y U
• X.Y (textbook)
• and(Z,X,Y) (Verilog)
 OR Gate

OR
X Y Z
X 0 0 0
Z 0 1 1 Z = X | Y
Y
1 0 1
1 1 1

Circuit Symbol Truth Table Boolean Expression

 OR
• X|Y (Verilog)
• X#Y (ABEL)
• X or Y (VHDL)
• X+Y (textbook)
• XVY
• XUY
• or(Z,X,Y) (Verilog)
 Basic Logic Gates
and Basic Digital Design
• NOT, AND, and OR Gates
• NAND and NOR Gates
• DeMorgan’s Theorem
• Exclusive-OR (XOR) Gate
• Multiple-input Gates
 NAND Gate

NAND
X Y Z
X 0 0 1
0 1 1 Z = ~(X & Y)
Z
1 0 1 nand(Z,X,Y)
Y 1 1 0

Circuit Symbol Truth Table Boolean Expression

 NAND Gate

NOT-AND
X Y W Z
X 0 0 0 1
W 0 1 0 1
Z
1 0 0 1
Y 1 1 1 0

Circuit Symbol Truth Table

W = X & Y
Z = ~W = ~(X & Y)
Boolean Expression
 NOR Gate

NOR X Y Z
0 0 1
X
Z 0 1 0 Z = ~(X | Y)
Y 1 0 0 nor(Z,X,Y)
1 1 0

Circuit Symbol Truth Table Boolean Expression

 NOR Gate

NOT-OR
X Y W Z
X 0 0 0 1
W
Z 0 1 1 0
Y 1 0 1 0
1 1 1 0
Circuit Symbol Truth Table

W = X | Y
Z = ~W = ~(X | Y)
Boolean Expression
 Basic Logic Gates
and Basic Digital Design
• NOT, AND, and OR Gates
• NAND and NOR Gates
• Exclusive-OR (XOR) Gate
• Multiple-input Gates
 Exclusive-OR Gate

XOR X Y Z

X 0 0 0 Z = X ^ Y
Z 0 1 1 xor(Z,X,Y)
Y
1 0 1
1 1 0
Circuit Symbol Truth Table Boolean Expression
 XOR

• X^Y (Verilog)
• X$Y (ABEL)
• X@Y
X  Y (textbook)
• xor(Z,X,Y) (Verilog)
 Exclusive-NOR Gate

X Y Z
XNOR
0 0 1 Z = ~(X ^ Y)
X 0 1 0 Z = X ~^ Y
Z
Y 1 0 0 xnor(Z,X,Y)
1 1 1

Circuit Symbol Truth Table Boolean Expression

 XNOR

• X ~^ Y (Verilog)
• !(X $ Y) (ABEL)
• X@Y
• xnor(Z,X,Y) (Verilog)

 X  Y(Textbook)
 Basic Logic Gates
and Basic Digital Design
• NOT, AND, and OR Gates
• NAND and NOR Gates
• Exclusive-OR (XOR) Gate
• Multiple-input Gates
Multiple-input Gates

Z1 Z2

Z3 Z4
n-input Gates
Multiple Input Gates output
 Logic Gates
• Basic gates : AND ,OR , NOT
• Universal Gates: NAND , NOR
• Special Gates : EX-OR , EX-NOR

• NAND and NOR Implementations

Logic circuits with AOI logic is converted
into the following two form
(a) Logic circuit with only NAND gates.
(b) Logic circuit with only NOR gates.

84
 Boolean Algebra and Theorems

• George Boole (1815-1864):

“An investigation of the laws of thought”
Boolean algebra provides the operations
and the rules for working with the set {0, 1}.
• Terminology:
• Literal: A variable or its complement
• Product term: literals connected by •
• Sum term: literals connected by +
• Minterm: a product term in which all the variables appear exactly once,
either complemented or uncomplemented
• Maxterm: a sum term in which all the variables appear exactly once,
either complemented or uncomplemented
 Boolean Algebra
 Boolean Constants – these are ‘0’ (false) and ‘1’ (true)
 Boolean Variables – variables that can only take the vales ‘0’ or ‘1’
 Boolean Functions – each of the logic functions (such as AND, OR
and NOT) are represented by symbols as described above
 Boolean Theorems – a set of identities and laws 
Boolean laws
Boolean Algebra Properties
90
DEMORGAN’s THEOREMS

91
92
93
Simplification of Boolean expression

94
95
96
Example

Simplify the Boolean expression

DUALITY

98
99
 BOOLEAN FUNCTIONS
• A Boolean function is an expression formed with binary variables, the two binary
operators OR and AND , the unary operator NOT, parentheses and an equal sign. For a
given value of the variables, the function can be either 0 or 1.

100
IMPLEMENTATION OF BOOLEAN FUNCTIONS
WITH GATES

101
 SOP & POS
• Product terms: A literal or product of literals.

• Sum terms: A literal or sum of literals.

• SOP: The logical sum of two or more product terms is called sum
of products expression.

• POS: The logical product of two or more sum terms is called

product of sums.
102
103
 MINTERMS AND MAXTERMS
• MINTERMS:(Product terms with all variables)
For n variable function there exist 2n number of minterns(mi).
• MAXTERMS: (Sum terms with all variables)
For n variable function there exist 2n number of minterns (Mi)

104
 CANNONICAL FORM
• Canonical SOP:
Each term in SOP form contains all the variables then the SOP
is known canonical SOP or standard SOP.

• Canonical POS:
Each term in POS form contains all the variables then the POS
is known canonical POS or Standard POS.

105
Canonical SOP

106
107
Canonical POS

108
109
 Minimization of Boolean expression

• Using Boolean properties and theorems

 Trial and error process,
 We can almost never be sure that we have reached a minimal
representation.
• Using K-Map
K-map is a graphical method used to obtained the most simplified
form of an expression in a standard form.
• Using Quine-McCluskey
No limit for Number of input variables.
 Boolean expression
F(var) = expression

Operators ( +, •, ‘ )
Variables
set of binary
Constants( 0, 1 )
variables
Groupings (parenthesis)

EXAMPLE:
F(a,b,c) = a’b’c + bc’ + ac’
F(X,Y,Z) = m(0,6)
 Minimization of Boolean expression
• Using Boolean properties and theorems
 Trial and error process,
 We can almost never be sure that we have reached a minimal
representation.
• Using K-Map
K-map is a graphical method used to obtained
the most simplified form of an expression in a
standard form.
K – Map Models
 Four Variable K - Maps
Four - Variable Map:
Simplify the Boolean expression,
Y = A’BC’D’ + A’BC’D + ABC’D’ + ABC’D + AB’C’D + A’B’CD’

Therefore,
Y= A’B’CD’+
AC’D+ BC’
Quine-Mc Cluskey (Tabular) Minimization
 The K map method of minimization of logic functions is
convenient as long as the number of variables does not exceed
4 or 5.
 When the number of variable increases, K map become very
difficult.
 To avoid this difficulty, Quine-McCluskey or Tabulation
method can be used.
 This method is developed by Quine and McCluskey.
 The procedure for simplification of Boolean
function by Quine- McCluskey method is
1. Each minterm should be expressed by its binary representation.
2. Arrange the minterms based on the number of 1’s
3. Compare each binary number from one group to other and if
they differ only one bit position, put dash (-) mark and copy the
remaining term.
4. Please tick () mark after each comparison. Apply the same
process described in step 3 for the resultant column and these
cycles have to be continued unitl no new list can be found (i.e.,
no further elimination of literals).
5. List the unchecked (unticked) implicant and form prime
implicant chart.
 Prime implicant chart
 The prime implicants should be represented in rows and each
minterm of the function in a column
 The cross (X) mark should be placed in each row to show the
comparison of minterms that make the prime implicants
 Search for single X column and select prime implicants
corresponding to that dot by putting the star (*) mark in front
of it
 Prime implicants that cover minterms with a single cross in
their column are called essential prime implicants
 Write the simplified expression using prime implicants
Example 1: Simplify the Boolean function by using
tabulation method
F(A,B,C,D) =∑m (0,2,3,6,7,8,10,12,13)
The minterms are represented in the binary form
as shown in Table below
Table (1) Binary Representation of minterms
The above binary representation are grouped into a number of
sections in terms of the number of 1's as shown in Table 2 below

Table 2 Group of minterms for different number of 1's

Any two number in these groups which differ from each other by
only variable can be chosen and combined, to get 2 cell
combination as shown in Table 3 below
Table 3: 2-cell combination
From the 2-cell combinations, are variable and a dash (-) in the
same position can be combined to form 4-cell combination as
shown in Table 4 below
4 cell combination

The cells (0,2) and (8,10) from the same 4 cell combination as
the cells (0,8) and (2,10).
The order in which the cells are placed in a combination does not
have any effect.
Thus the (0,2,8,10) combination may be given as (0,8,2,10) i.e.,
(0,2,8,10) = (0,8,2,10) (2,3,6,7) = (2,6,3,7)
Using Table 3 and 4 the prime implicant table can be as shown in
Table 5 below
Table 5 Prime Implicant Table

The columns having only one cross (X) mark correspond to essential
prime implicants.
A tick mark put against every column which has only one cross mark.
A star (*) mark is placed against every essential prime implicant.
The sum of the prime implicants gives the function in its minimal SOP
form.
Therefore,