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CSE 460 Lec 1 Introduction

This document provides an overview of the CSE 460: VLSI Design course. It will cover topics such as digital logic design, CMOS circuit design and fabrication, combinational and sequential circuit design using CMOS, finite state machines, Verilog hardware description language, CMOS DC response and power/delay analysis, and memory element design. Students will be graded on attendance, quizzes, assignments, software assignments, a midterm exam, and a final exam. The course references listed are CMOS VLSI Design by Weste et al. and Fundamentals of Digital Logic with Verilog Design by Brown and Vranesic.

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Shovon Bhowmick
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82 views19 pages

CSE 460 Lec 1 Introduction

This document provides an overview of the CSE 460: VLSI Design course. It will cover topics such as digital logic design, CMOS circuit design and fabrication, combinational and sequential circuit design using CMOS, finite state machines, Verilog hardware description language, CMOS DC response and power/delay analysis, and memory element design. Students will be graded on attendance, quizzes, assignments, software assignments, a midterm exam, and a final exam. The course references listed are CMOS VLSI Design by Weste et al. and Fundamentals of Digital Logic with Verilog Design by Brown and Vranesic.

Uploaded by

Shovon Bhowmick
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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CSE 460: VLSI Design

TA N V I R A H M E D
L E C T U R E R , D E P T. O F C S E , B R A C U
E M A I L : TA N V I R . A H M E D @ B R A C U . A C . B D
Rubrics
You will be graded on the following criteria (yet to be finalized):
 Attendance
 Quizzes
 Assignments
 Software assignments
 Midterm
 Final
Contents
 Introduction to VLSI, History, Timeline
 Digital logic design review, Logic gates and sequential circuit elements
 CMOS Circuit design, fabrication, characterization
 Combinational and sequential circuit design using CMOS
 Finite State Machines (FSM)
 Introduction to Verilog (a hardware description language)
 CMOS DC response, Power and Delay analysis
 Memory element design
 Complete VLSI flow (from silicon to chip)
Text & References
# Title Author(s) Edition
1. CMOS VLSI Design N.H.E. Weste, D. Harris & A. Banerjee 4th ed.
2. Fundamentals of Digital Logic with Stephen Brown & Zvonko Vranesic 2nd/3rd ed.
Verilog Design
Introduction
 Integrated circuits (IC): many transistors on one chip
 Very Large Scale Integration (VLSI): bucket-loads! Integration Levels
 Complementary Metal Oxide Semiconductor SSI: 1-12 gates
Fast, cheap, low power transistors MSI: 13-99 gates
 Today: How to build your own simple CMOS chip LSI: 100-9999 gates
CMOS transistors
Building logic gates from transistors VLSI: 10-99.9 k gates
Transistor layout and fabrication ULSI: >100k gates
 Rest of the course: How to build a good CMOS chip
Fabrication
The process through which a Silicon wafer becomes a chip/IC
A Brief History
1958: FIRST INTEGRATED CIRCUIT 2010:
Flip-flop using two transistors Intel Core i7 microprocessor 2.3 billion
Built by Jack Kilby at Texas Instruments transistors
64 Gb Flash memory: > 16 billion
transistors
Invention of the Transistor
Vacuum tubes ruled in first half of 20th century
 Large, expensive, power-hungry, unreliable
1947: first point contact transistor
Transistor types
 Bipolar Junction Transistors
 2 types of carriers are used for conduction (holes & electrons)
 n-p-n or p-n-p structure
 Small current into very thin base layer controls large currents between emitter and
collector
 Field Effect Transistors
 Unipolar
 JFET, MOSFET, FinFET are some of the most common FETs
 Voltage applied to insulated gate controls current between source and drain
 Low power allows very high integration
How do Transistors look irl?

Reference: https://randomnerdtutorials.com/electronics-basics-how-a-transistor-works/
MOSFET Schematic
Transistor symbols
CMOS vs FinFET (2D vs 3D Transistor)
MOS Integrated Circuits
 1970’s usually had only n-MOS transistors: Inexpensive, but consume power while idle

Intel 1101 256-bit SRAM Intel 4004 4-bit mProc

 1980s-present: CMOS processes for low idle power


Moore’s law
 1965: Gordon Moore plotted transistor on each chip
 Fit straight line on semi-log scale
 Transistor counts have doubled about every 2 years
 Then vs. up to 2000s
Feature Size
Feature size, f = distance between source and drain

Minimum feature

size shrinking 30%

every 2-3 years


Design Abstraction

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