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Static Logic vs. Pseudo-nMOS: Static Logic Includes Pull-Up and Pull-Down Networks - 2n Transistors For N-Input Function

The document compares static logic and pseudo-nMOS (a type of dynamic logic). Static logic uses pull-up and pull-down networks with 2n transistors for an n-input function, while pseudo-nMOS uses n+1 transistors but requires the pull-up transistor to be weaker. Dynamic logic avoids static power dissipation but introduces problems with charge sharing and leakage, requiring precharging of nodes. Domino and zipper logic are examples of dynamic logic styles that use precharging and pulldowns to selectively discharge outputs.

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Tareg Abubaker
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32 views

Static Logic vs. Pseudo-nMOS: Static Logic Includes Pull-Up and Pull-Down Networks - 2n Transistors For N-Input Function

The document compares static logic and pseudo-nMOS (a type of dynamic logic). Static logic uses pull-up and pull-down networks with 2n transistors for an n-input function, while pseudo-nMOS uses n+1 transistors but requires the pull-up transistor to be weaker. Dynamic logic avoids static power dissipation but introduces problems with charge sharing and leakage, requiring precharging of nodes. Domino and zipper logic are examples of dynamic logic styles that use precharging and pulldowns to selectively discharge outputs.

Uploaded by

Tareg Abubaker
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Static Logic vs.

Pseudo-nMOS

Static Logic includes pull-up and pull-down networks - 2n transistors for n-input
function.

weak

Pseudo-nMOS - n+1 transistors for n-input function


Requires pull-up transistor be weaker than pull-down network (5:1)
May eliminate p-transistors & possibly long pull-up chains
Static power dissipation
Pseudo-pMOS similar, except entirely out of p-transistors (good for NANDs)
93
Building weak transistors

Weakening transistors requires reducing width, increasing length (R=L/W)

Create transistor with at least 5x greater resistance than others it fights against

R=2/3 R=10/3

R=2/15 A Vdd

R=10/3, less load on signal A

94
Dynamic Logic

Like pseudo-nMOS except don't always pull up

precharge

precharge
Initially charge output capacitance

Need to make sure pull-down isn't fighting it

Selectively discharge through pull-down network

Avoids static power dissipation (and is faster), but more dynamic power

95
Charge Sharing

Redistribution of charge can degrade or change values

A Precharge

Solution is to also precharge internal nodes

precharge
precharge

Note: Moves late-arriving


signals closer to output

96
Charge Leakage

Compensate for leaking charge on output

Advantages of dynamic logic (less transistors) but has static power dissipation

Can avoid static power dissipation with inverter

weak
precharge weak precharge

97
Domino Logic

Blocks in pseudo-nMOS style with inverter on output (non-inverting logic)

Precharging all blocks - outputs equal to 0

Ensures no other pull-down networks are interfering with precharging

When precharging is completed dominoes begin falling from first stage to last

Final result is some output stay low while others go high

precharge precharge precharge

pull-down pull-down pull-down


network network network

98
Zipper Logic

Alternating blocks of n-type and p-type networks (provides an inversion)

By alternating stages, during precharge each gate's network is turned off by


precharge of previous stage

Similar to domino but transistors are easier to pack since there are equal
numbers of each type on average

precharge pull-up precharge


network
pull-down pull-down
network precharge network

99
Static vs. Dynamic Logic

Static
+ no charge sharing problems
+ no charge leakage problems
+ no static power dissipation
- 2n transistors
- series transistors always exist (slower)

Dynamic
+ n+1 transistors
- charge sharing
- charge leakage
- can have static power dissipation
+ potentially faster (eliminate series transistors)
- more complex control (generate precharge signal)

100

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