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Lect 9,10 - MOSFET DC Analysis

Here are the steps to solve this problem: 1) Calculate VG using voltage divider rule: VG = (R2/(R1+R2)) * VDD = (2kΩ/(2kΩ + 4kΩ)) * 12V = 6V 2) Given: ID(ON) = 5mA for VGS = 6V. So the MOSFET is in saturation. 3) Calculate IDQ: IDQ = ID(ON) = 5mA 4) Calculate VGSQ: VGSQ = VG - VTH = 6V - 3V = 3V 5) Calculate VD: Use

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1K views17 pages

Lect 9,10 - MOSFET DC Analysis

Here are the steps to solve this problem: 1) Calculate VG using voltage divider rule: VG = (R2/(R1+R2)) * VDD = (2kΩ/(2kΩ + 4kΩ)) * 12V = 6V 2) Given: ID(ON) = 5mA for VGS = 6V. So the MOSFET is in saturation. 3) Calculate IDQ: IDQ = ID(ON) = 5mA 4) Calculate VGSQ: VGSQ = VG - VTH = 6V - 3V = 3V 5) Calculate VD: Use

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shashikala koti
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MOSFET DC ANALYSIS

ID (mA)

y-intercept

Q-POINTS
ID VGS

VDS (V)
VDS x-intercept
LOAD LINE
• Common source configuration i.e source is
grounded.
• It is the linear equation of ID versus VDS
• Use KVL
• VDS = VDD – IDRD
• ID = -VDS + VDD
RD RD
• NMOS • PMOS
o VTN is POSITIVE o VTP is NEGATIVE
o VGS > VTN to turn on o VSG > |VTP| to turn on
o Triode/non-saturation o Triode/non-saturation
region region

o Saturation region o Saturation region

o VDSsat = VGS - VTN o VSDsat = VSG + VTP


Simplified I – V equations
Cut-off: VGS< VT
ID = IS = 0
Triode: VGS>VT and VDS < VGS-VT
ID = kn’(W/L)[(VGS-VT)VDS - 1/2VDS2]
Saturation: VGS>VT and VDS > VGS-VT
ID = 1/2kn’(W/L)(VGS-VT)2

where kn’= (electron mobility)x(gate capacitance)


= mn(eox/tox) …electron velocity = mnE
and VT depends on the doping concentration and gate material
used
MOSFET DC Circuit Analysis - NMOS
 The source terminal is
at ground and common
to both input and output
portions of the circuit.
 The CC acts as an open
circuit to dc but it allows
the signal voltage to the
gate of the MOSFET.

 In the DC equivalent circuit, the gate current into the transistor is


zero, the voltage at the gate is given by a voltage divider
principle:
VG = VTH = R2 VDD
R1 + R2
Use KVL at GS loop:
VGS –VTH + 0 = 0
VGS = VTH
MOSFET DC Circuit Analysis - NMOS
1. Calculate the value of VGS

2. Assume the transistor is biased in the saturation


region, the drain current:

3. Use KVL at DS loop


IDRD + VDS – VDD = 0

4. Calculate VDSsat = VGS - VTN

5. Confirm your assumption:


If VDS > VDS(sat) = VGS – VTN, then the transistor is biased in the
saturation region. If VDS < VDS(sat), then the transistor is biased in the
non-saturation region.
Ex 1. For the circuits shown in figure, Calculate
VGS,ID, VDS & show that MOS is in saturation
region
Ex 2. For the circuits shown in figure, Calculate IDQ,
VDSQ & VP
Ex 3. For the circuits shown in figure, Calculate VG
ID, VGS & VDS
Ex 4. Determine IDQ, VGSQ, VD & VG for the MOSFET circuits
shown in the figure below . Given VGS(TH) = 3 V, ID(ON) = 5 mA,
VGS(ON) = 6 V

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