Chap. 3 Data Representation
Chap. 3 Data Representation
Binary-Coded-Decimal Code
Each digit of a decimal number is represented by its binary equivalent
8 7 4 (Decimal)
3-2 Complements
Complements are used in digital computers for simplifying the
subtraction operation and for logical manipulation
There are two types of complements for base r system
1) r’s complement 2) (r-1)’s complement
» Binary number : 2’s or 1’s complement
» Decimal number : 10’s or 9’s complement
N : given number
(r-1)’s Complement r : base
(r-1)’s Complement of N = (rn-1)-N n : digit number
» 9’s complement of N=546700
(106-1)-546700= (1000000-1)-546700= 999999-546700
= 453299 546700(N) + 453299(9’s com)
=999999
» 1’s complement of N=101101
(26-1)-101101= (1000000-1)-101101= 111111-101101
= 010010 101101(N) + 010010(1’s com)
=111111
r’s Complement
r’s Complement of N = rn-N
* r’s Complement
(r-1)’s Complement +1 =(rn-1)-N+1= rn-N
» 10’s complement of 2389= 7610+1= 7611
» 2’s complement of 1101100= 0010011+1= 0010100
» Decimal Example)
M N 72532(M) - 13250(N) = 59282 MN 13250(M) - 72532(N) = -59282
72532 13250
Discard + 86750 (10’s complement of 13250) + 27468 (10’s complement of 72532)
End Carry 1 59282 0 40718
No End Carry
Result = 59282 Result = -(10’s complement of 40718)
= -(59281+1) = -59282
» Binary Example)
X Y 1010100(X) - 1000011(Y) = 0010001 XY 1000011(X) - 1010100(Y) = -0010001
1010100 1000011
+ 0111101 (2’s complement of 1000011) + 0101100 (2’s complement of 1010100)
1 0010001 0 1101111
Result = 0010001 Result = -(2’s complement of 1101111)
= -(0010000+1) = -0010001
*Numeric Data
1) Fixed Point
3-3 Fixed-Point Representation 2) Floating Point
Computers must represent everything with 1’s and 0’s, including the
sign of a number and fixed/floating point number
* 32.25
Binary/Decimal Point 1) 0.25, 2) 32.0, 3) 32.25
The position of the binary/decimal point is needed to represent fractions,
integers, or mixed integer-fraction number
Two ways of specifying the position of the binary point in a register
1) Fixed Point : the binary point is always fixed in one position
» A binary point in the extreme left of the register(Fraction : 0.xxxxx)
» A binary point in the extreme right of the register(Integer : xxxxx.0)
The binary point is not actually present, but the number stored in the register is treated
as a fraction or as an integer
2) Floating Point : the second register is used to designate the position of the
binary point in the first register(refer to 3-4) * MSB for Sign
Integer Representation +14 -14 “0” is plus +
“1” is minus -
Most
Signed-magnitude representation 0 0001110 1 0001110
Common Signed-1’s complement representation 0 0001110 1 1110001
Signed-2’s complement representation
0 0001110 1 1110010
Overflow
Two numbers of n digits each are added and the sum occupies n+1 digits
n + 1 bit cannot be accommodated in a register with a standard length of n
bits(many computer detect the occurrence of an overflow, and a
corresponding F/F is set)
Computer System Architecture Chap. 3 Data Representation Dept. of Info. Of Computer
3-9
Overflow
An overflow may occur if the two numbers added are both positive or both
negative
» When two unsigned numbers are added
an overflow is detected from the end carry out of the MSB position
» When two signed numbers are added * Overflow Exam)
out in out in
the MSB always represents the sign
carries 0 1 carries 1 0
- the sign bit is treated as part of the number
+ 70 0 1000110 - 70 1 0111010
- the end carry does not indicate an overflow
+ 80 0 1010000 - 80 1 0110000
Overflow Detection
+ 150 1 0010110 - 150 0 1101010
Detected by observing the carry into the sign bit position and the carry out of
the sign bit position
If these two carries are not equal, an overflow
*Decimal Exam) (+375) + (-240)
condition is produced(Exclusive-OR gate = 1) 375 + (10’s comp of 240)= 375 + 760
Decimal Fixed-Point Representation
0 375 (0000 0011 0111 0101)
A 4 bit decimal code requires four F/Fs +9 760 (1001 0111 0110 0000)
* Advantage * for each decimal digit 0 135 (0000 0001 0011 0101)
Computer I/O data The representation of 4385 in BCD requires 16 F/Fs (0100 0011 1000 0101)
are generated by
people who use The representation in decimal is wasting a considerable amount of storage
the decimal space and the circuits required to perform decimal arithmetic are more complex
system
Transmitter Receiver
~
Parity Bit
An extra bit included with a binary message to make the total number of 1’s
either odd or even(Tab. 3-7)
Even-parity method
The value of the parity bit is chosen so that the total number of 1s (including
the parity bit) is an even number
1 1 0 0 0 0 1 1
Added parity bit
Odd-parity method
Exactly the same way except that the total number of 1s is an odd number
1 1 0 0 0 0 0 1
Added parity bit
Parity Generator/Checker
At the sending end, the message is applied to a parity generator
At the receiving end, all the incoming bits are applied to a parity checker
1 1 0 0 0 0 1 1 “C” 1 1 0 0 0 0 1 0 ”B”
(Even-parity Generator) (Even-parity Checker)
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