Instruction Sets:

Addressing Modes
and Formats

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 Definition
Instruction set: The operation of the CPU is determined by the instructions it
executes, called machines instructions. The collection of different instructions
that the CPU can executes is refereed to as the instruction set.
The instruction set provides commands to the processor, to tell it what it needs to do
Elements of machine instructions
• Operation code (Op code)
– Do this
• Source Operand reference
– To this
• Destination (Result) Operand reference
– Put the answer here
• Next Instruction Reference
– When you have done that, do this...

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 Instruction Representation
Within the computer, each instruction is
represented by sequence of bits. The
instruction is divided into fields corresponding
to the constituent elements of the instruction.
12 bits specify an address
Three bits specify the operation(opcode)
The mode bit specify the address mode.

A simple instruction format

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 Instruction type
• Data processing
• Data storage (main memory)
• Data movement (I/O)
• Program flow control
Types of Operation
• Data Transfer
• Arithmetic
• Logical
• Conversion
• I/O
• System Control
• Transfer of Control

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 Instruction Representation
It is worthy to note that it is difficult for even
programmer to deal with binary representation
of the machines instructions. Thus, symbolic
representation of machines codes becomes
necessary.
Opcodes are therefore represented by
abbreviation called mnemonics, that indicate the
operation to be performed.

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 Definition
• Addressing mode: Addressing modes are
concerned with how the CPU accesses the
operands used by its instructions
• Effective address: The address of operand
produced by the application of the rule for
interpreting or modifying the address field of
the instruction before the operand is actually
referenced.

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 Addressing Modes
• Immediate (Implied)
• Direct
• Indirect
• Register
• Register Indirect
• Displacement (Indexed)
• Stack

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 Immediate Addressing
• Operand is part of instruction
• Immediate addressing is indicated by a # symbol
in front of the source operand.
• Operand = address field
• e.g. ADD 5
– Add 5 to contents of accumulator
– 5 is operand
• No memory reference to fetch data
• Fast
• Limited range
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Immediate Addressing Diagram
Instruction
Opcode Operand

For example, MOVE.B #24,D0 uses the

immediate source operand 24.

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 Immediate Addressing Sample
1

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 Direct Addressing
• Address field contains address of operand
• That is, the instruction provides the address of the operand in memory
• Effective address (EA) = address field (A)
•  In this mode, the address field contain the Effective Address of operand 
• e.g. ADD A
– Add contents of cell A to accumulator
– Look in memory at address A for operand
• Direct addressing requires two memory accesses. The first is to access the
instruction and the second is to access the actual operand.

• No additional calculations to work out effective address

• Limited address space

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 Direct Addressing Diagram
Instruction
Opcode Address A
Memory

Operand

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Direct Addressing Sample

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Direct Addressing Result

M em ory

M O V E .B 2 0 ,D 0

20 42
42 D0

The effect of MOVE.B 20,D0

is to read the contents of memory
location 20 and copy them to D0
Addressing Modes 14
 Indirect Addressing (1)
• Memory cell pointed to by address field
contains the address of (pointer to) the
operand
• Control fetches the instruction from memory
and then uses its address part to access
memory again to read Effective Address
• EA = (A)
– Look in A, find address (A) and look there for
operand
• e.g. MOVE.B (A0),D0.
– The specified address memory contains the 15
 Indirect Addressing (2)
• Large address space
• 2n where n = word length
• May be nested, multilevel, cascaded
– e.g. EA = (((A)))

• Multiple memory accesses to find operand

• Hence slower

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 Indirect Addressing Diagram
Instruction
Opcode Address A
Memory

Pointer to operand

Operand

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Indirect Addressing Sample

M em ory This instruction means

M O V E .B (A 0 ),D 0
load D0 with the contents
A0 of the location pointed at
1000
by address register A0

1000 42 D0

The instruction specifies the

source operand as (A0).

Addressing Modes 18
Indirect Addressing Result

The address register in the instruction

specifies an address memory that holds
the address of the operand
Addressing Modes 19
Indirect Addressing Result 2

M em ory

A0 M O V E .B (A 0 ),D 0

1000

1000 57 D0

Finally, the contents of the memory address

pointed at by A0 are copied to the data register

Addressing Modes 20
 Register Addressing (1)
• Operand is held in register named in address filed
•  The operands are in registers that reside within the CPU
• In  this mode, instruction specifies a register in CPU, which
contain the operand.
• It is like Direct, but address field refers to a register instead of
 memory location.
• EA = R
• Limited number of registers
• Very small address field needed
– Shorter instructions
– Faster instruction fetch

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 Register Addressing (2)
• No memory access
• Very fast execution
• Very limited address space
• Multiple registers helps performance
– Requires good assembly programming or compiler
writing
• c.f. Direct addressing

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 Register Addressing Diagram
Instruction
Opcode Register Address R
Registers

Operand

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 Register Indirect Addressing
• In these address mode, the selected register contain
the address of operand rather than the operand itself
• EA = (R)
• Control fetches instruction from memory and then
uses its address to access Register and   looks in
Register(R)  for effective address of operand in
memory.
• That is, operand is in memory cell pointed to by
contents of register R
• Large address space (2n)
• One fewer memory access than indirect addressing
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 Register Indirect Addressing Diagram

Instruction
Opcode Register Address R
Memory

Registers

Pointer to Operand Operand

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 Displacement Addressing
• This addressing mode combines the capabilities of direct
addressing and register indirect addressing
• EA = A + (R)
• Address field hold two values
– A = base value
– R = register that holds displacement
• Value is contained in addressing field A, which is used directly
and the value in other address field is R, which refers to a
register whose contents are to be added to produce effective
   address.
• This are of three types
– Relative addressing mode
– Base register addressing mode
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– Index addressing mode
 Displacement Addressing
• EA = A + (R)
• Address field hold two values
– A = base value
– R = register that holds displacement
• Value is contained in addressing field A, which is used directly
and the value in other address field is R, which refers to a
register whose contents are to be added to produce effective
   address.
• This are of three types
– Relative addressing mode
– Base register addressing mode
– Index addressing mode
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 Displacement Addressing Diagram

Instruction
Opcode Register R Address A
Memory

Registers

Pointer to Operand + Operand

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 Relative Addressing
•  In Relative Addressing Mode, the address of the
operand is obtained by adding a constant to the
content of a register, called the Program Counter (PC)
• R = Program counter, PC
• EA = A + (PC)
• That is, the address field of the instruction is added to
implicitly reference register Program Counter to
obtain effective address
• Example, LOAD X(PC), R, implies loads register R with
the contents of the memory location whose address
is the sum of the contents of the program counter
(PC) and the value X
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 Relative Addressing Diagram
.

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 Relative Addressing Example
• Assume that PC contains the value 825 and the address part of instruction
contain 24, then the instruction at location 825 is read from memory
during fetch phase and the Program Counter is then incremented by one
to 826. What is the effective address?

Thus, Effective Address is displacement relative to the address of

instruction. Relative Addressing is often used with branch type instruction.
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 Base-Register Addressing
•  In this mode, the content of the Base Register
is added to the direct address part of the
instruction   to obtain the effective address
• The register indirect address field point to the
Base Register
• A holds displacement
• R holds pointer to base address
• R may be explicit or implicit
• EA = A + Base register
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 Example of Base-Register Addressing 100

The Base Register is assumed to hold a base address and the

direct address field of instruction gives a displacement relative
to this base address.

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 Indexed Addressing
• In this addressing mode, the address of the operand
is obtained by adding a constant to the content of a
register, called the index register
• Example, LOAD X(Rind), R. This instruction loads
register R with the contents of the memory location
whose address is the sum of the contents of register
Rind and the value X.
• EA = A + R
• Good for accessing arrays
– EA = A + R
– R++
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Indexed Addressing Diagram

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Sample Indexed Addressing

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 Index Addressing operation
• .
• This instruction loads register Ri with the operand whose
address is the content of register Rauto. After loading the
operand into register Ri, the content of register Rauto is
incremented, pointing for example to the next item in a list of
items.

• This instruction decrements the content of the register Rauto

and then uses the new content as the effective address of the
operand that is to be loaded into register Ri

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 Combinations
• Postindex
• EA = (A) + (R)

• Preindex
• EA = (A+(R))

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PostIndex; Before Execution

After Execution

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PreIndex Before Execution

After Execution

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 Stack Addressing
• Operand is (implicitly) on top of stack
• e.g.
– ADD Pop top two items from stack
and add

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 Instruction Format
• The operation of CPU is determined by the instructions it
executes (machine or computer instructions)
• CPU’s instruction set – the collection of different instructions
that CPU can execute
• Each instruction must contain the information required by CPU
for execution :-
1. Operation code (opcode) -- specifies the operation to be performed (eg:
ADD, I/O) do this
2. Source operand reference -- the operation may involve one or more source
operands (input for the operation)  to this
3. Result operand reference -- the operation may produce a result  put the
answer here
4. Next instruction reference -- to tell the CPU where to fetch the next
instruction after the execution of this instruction is complete  do this
when you have done that

opcode

2 3 4
1 42
• Operands (source & result) can be in one of the 3 areas:-
– Main or Virtual Memory
– CPU register
– I/O device
• It is not efficient to put all the information required by CPU in a machine
instruction
• Each instruction is represented by sequence of bits & is divided into 2 fields;
opcode & address

opcode address

• Processing become faster if all information required by CPU in one instruction

or one instruction format

opcode address for Operand 1 address for Operand 2 address for Result address for Next instruction

• Problems  instruction become long (takes a few words in main memory to

store 1 instruction)
• Solution  provide a few instruction formats (format instruction); 1, 2, 3 and
addressing mode.
• Instruction format with 2 address is always used; INTEL processors
• Design Issues of instruction format
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 Instruction Length
• Affected by and affects:
– Memory size
– Memory organization
– Bus structure
– CPU complexity
– CPU speed
• Trade off between powerful instruction
repertoire and saving space

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 Allocation of Bits
• Number of addressing modes
• Number of operands
• Register versus memory
• Number of register sets
• Address range
• Address granularity

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Instruction-3-address
opcode address for Result address for Operand 1 address for Operand 2

Memory addresses for two operands and one destination

address need to be specified

• Example : SUB Y A B Y=A-B

– Result  Y
– Operand 1  A
– Operand 2  B
– Operation = subtracts
– Address for Next instruction?  program counter (PC)

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 Example of 3 Address Instruction
3 Address instruction
Instruction: ADD R1,R2,R3
Operation: R1 R2 + R3
Example:
Evaluate X = (A+ B)* (C+D)
ADD R1 A,B
ADD R2 C,D
MULTI X,R1,R2

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Instruction-2-address

opcode address for Operand 1 & Result address for Operand 2

• Example : SUB Y B Y=Y-B

– Operand 1  Y
– Operand 2  B
– Result  replace to operand 1
– Address for Next instruction?  program counter (PC)

Two address register are specified

Assumes that the destination address is the same as that of the
first operand.

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 Example of 2 Address Instruction
2 Address instruction
Instruction: ADD R1,R2
Operation: R1 R1 + R2
Example:
Evaluate X = (A+ B)* (C+D)
Move R1, A
ADD R1, B
Move R1, C
ADD R1, D
MULTI R1,R2
Move X, R1

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Instruction-1-address

opcode address for Operand 2

• Example :
LOAD A
ADD B AC = AC + B
or
SUB B AC = AC - B
– Operand 1 & Result  in AC (accumulator), a register
– SUB B  B subtracts from AC, the result stored in AC
– Address for Next instruction?  program counter (PC)
• Short instruction (requires less bit) but need more instructions
for arithmetic problem

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 Types of Address Instruction
1 Address instruction
One address can be a register name or memory
address.
It uses AC register for all data manipulation.
Example:
Instruction: ADD X
Operation: AC AC + M[X ]
Assignment: Evaluate X = (A+ B)* (C+D), using one
address instruction.

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Zero Address instruction
Stack is used. Arithmetic operation pops two operands
from the stack and pushes the results.
Also refers to as stack organization.
Example, Evaluate X = (A+ B)* (C+D). Push A
Push A Push B
Push B
ADD
ADD
Push C Push C
Push D Push D
MULTI ADD
POP X MULTI
POP X
Store
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