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Module 3

The document discusses the design of subsystems using a top-down approach. It addresses general considerations in subsystem design such as lower costs, higher reliability, and better performance. Additionally, it discusses challenges in VLSI design like designing complex systems efficiently, suitable architectures, and testability. These challenges can be reduced by following a top-down design with CAD tools, sensible partitioning, simple interconnections, and regularity within subsystems. The document also provides illustrations of design processes and arrangements for an arithmetic processor and shifter.

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Praveen Andrew
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© © All Rights Reserved
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Download as PPTX, PDF, TXT or read online on Scribd
23 views

Module 3

The document discusses the design of subsystems using a top-down approach. It addresses general considerations in subsystem design such as lower costs, higher reliability, and better performance. Additionally, it discusses challenges in VLSI design like designing complex systems efficiently, suitable architectures, and testability. These challenges can be reduced by following a top-down design with CAD tools, sensible partitioning, simple interconnections, and regularity within subsystems. The document also provides illustrations of design processes and arrangements for an arithmetic processor and shifter.

Uploaded by

Praveen Andrew
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Subsystem Design

Processes
General Considerations
Ways of handling problems, provides way of designing and realizing
systems which are too complex
• Lower unit cost
• Higher reliability
• Lower power dissipation, lower weight and lower volume
• Better performance
• Enhanced repeatability
• Possibility of reduced design/development periods
Some Problems related with VLSI design are
1. How to design complex systems in a reasonable time and reasonable
effort.
2. The nature of architectures best suited to take full advantage of VLSI
and the technology
3. The testability of large/complex systems once implemented on
silicon
• Problem 1 & 3 are greatly reduced if two aspects are followed.
a) Top-down design approach with adequate CAD tools
b) Partitioning the system sensibly
c) Aiming for simple interconnections
d) High regularity within subsystem
e) Generate and then verify each section of the design
Devote significant portion of total chip area to test and diagnostic facility
Problem 2 can be solved by
• Select architectures that allow design objectives and high regularity in realization
Illustration of Design Processes
• Structured design begins with the concept of hierarchy.
• Coupling can be used as a measure the sub-modules interconnection.
• Concurrency should be exploited
• The adaptation to a new process must occur in a short time.
General Arrangement of a 4-bit Arithmetic
Processor
• One bus architecture:

• Two bus architecture:


• Three bus architecture:
Design of 4 bit shifter
• A general purpose n-bit shifter should be capable of shifting n
incoming data up to n-1 place either in a right or left direction.
• Shifting should take place in ‘end-around’ basis
• The shifter must have:
1. input from a four line parallel data bus
2. Four output lines for the shifted data
3. The input data can be transferred to output lines using shift from 0,
1, 2 to 3 bits
PLA

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