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    Stick Diagram

    Uploaded by

    Praveen Andrew
    - A stick diagram is a graphical representation of a layout that shows the relative placement of components but not exact sizes, lengths, or boundaries. - It uses different colored sticks to represent different layers like metal, polysilicon, diffusion, etc. - Design rules define the spacing and dimensions between layers in a process to ensure correct fabrication of the intended circuit. They include minimum line widths and spacing between elements on each layer.

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    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd

    Stick Diagram

    Uploaded by

    Praveen Andrew
    122 views20 pages
    - A stick diagram is a graphical representation of a layout that shows the relative placement of components but not exact sizes, lengths, or boundaries. - It uses different colored sticks to represent different layers like metal, polysilicon, diffusion, etc. - Design rules define the spacing and dimensions between layers in a process to ensure correct fabrication of the intended circuit. They include minimum line widths and spacing between elements on each layer.

    Original Title

    STICK DIAGRAM

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    - A stick diagram is a graphical representation of a layout that shows the relative placement of components but not exact sizes, lengths, or boundaries. - It uses different colored sticks to represent different layers like metal, polysilicon, diffusion, etc. - Design rules define the spacing and dimensions between layers in a process to ensure correct fabrication of the intended circuit. They include minimum line widths and spacing between elements on each layer.

    Copyright:

    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
    Download as ppt, pdf, or txt
    122 views20 pages

    Stick Diagram

    Uploaded by

    Praveen Andrew
    - A stick diagram is a graphical representation of a layout that shows the relative placement of components but not exact sizes, lengths, or boundaries. - It uses different colored sticks to represent different layers like metal, polysilicon, diffusion, etc. - Design rules define the spacing and dimensions between layers in a process to ensure correct fabrication of the intended circuit. They include minimum line widths and spacing between elements on each layer.

    Copyright:

    © All Rights Reserved
    Download as PPT, PDF, TXT or read online from Scribd
    Download as ppt, pdf, or txt
    of 20

    STICK DIAGRAM

    EMT251
    Schematic vs Layout
    VDD

    VDD

    M2
    In Out

    M1

    Out
    In

    Inverter circuit

    GND
    Schematic vs Layout
    VDD 2-input NAND gate
    VDD

    B
    A B

    Out
    A

    GND
    Stick Diagram
     A stick diagram is a graphical view of a
    layout.
     Does show all components/vias (except
    possibly tub ties), relative placement.
     Does not show exact placement, transistor
    sizes, wire lengths, wire widths, tub
    boundaries.
    Stick Diagram
     Represents relative positions of transistors
     Stick diagrams help plan layout quickly
     Need not be to scale
     Draw with color pencils or dry-erase markers

    VDD VDD

    Inverter
    NAND2

    Out Out

    In A B
    GND GND
    Stick Diagram

    Layers
    Metal (BLUE)
    Polysilicion (RED )
    N-Diffusion (Green)
    P-Diffusion (Brown)
    Contact / Via
    How to design?
    Logic Graph / Euler Path
    X PUN
    A
    j C
    B C

    X i VDD
    X = C • (A + B)
    C
    i B j A

    A B
    PDN
    A GND
    B
    C
    Stick Diagram of C • (A + B)
    A C B A B C

    VDD VDD

    X X

    GND GND
    Consistent Euler Path

    X i VDD

    B j A

    GND A B C
    Example
    X PUN
    A C

    B D D C

    X VDD
    X = (A+B)•(C+D)

    C D
    B A

    A B PDN
    A GND
    B
    C
    D
    LAYOUT DESIGN
    RULES
    EMT251
    3D View
    Design Rules
     Interface between designer and process
    engineer
     Guidelines for constructing process masks
     Unit dimension: Minimum line width
    scalable design rules: lambda
    parameter
    absolute dimensions (micron rules)
    CMOS Process Layers
    Layer Color Representation

    Well (p,n) Yellow


    Active Area (n+,p+) Green
    Select (p+,n+) Green
    Polysilicon Red
    Metal1 Blue
    Metal2 Magenta
    Contact To Poly Black
    Contact To Diffusion Black
    Via Black
    Layers in 0.25 m CMOS process
    Intra-Layer Design Rules
    Same Potential Different Potential

    9 2
    0
    Well or Polysilicon
    6
    10 2
    3 3
    Active Metal1
    Contact
    or Via 2
    3 Hole 3
    2 2 4
    Metal2
    Select

    3
    Transistor Layout
    Transistor

    3 2

    5
    Vias and Contacts
    2
    4
    Via
    1 1
    5
    Metal to
    Metal to 1 Poly Contact
    Active Contact 3 2

    2
    2
    Select Layer
    2
    Select
    3
    2

    1
    3 3

    2 5

    Well
    Substrate
    CMOS Inverter Layout

    GND In VDD

    Out

    (a) Layout

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