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Works On Floorplan: Polish Expression (1/8)

The document discusses three works on floorplan algorithms: Stockmeyer's algorithm, Wong and Liu's normalized polish expression representation, and an ILP-based approach. It then focuses on explaining normalized polish expressions, including Wong and Liu's algorithm for generating them and examples of moves between expressions.

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Gorantala Anil Kumar
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115 views15 pages

Works On Floorplan: Polish Expression (1/8)

The document discusses three works on floorplan algorithms: Stockmeyer's algorithm, Wong and Liu's normalized polish expression representation, and an ILP-based approach. It then focuses on explaining normalized polish expressions, including Wong and Liu's algorithm for generating them and examples of moves between expressions.

Uploaded by

Gorantala Anil Kumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd
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Works on Floorplan

1. Stockmeyer algorithm [Stockmeyer, 1983]


2. Normalized polish expression [Wong and Liu, 1986]
3. ILP-based floorplanning algorithm [Sutanthavibul et al.,
1991]

 The first work determines the optimal orientation of the


blocks in a given slicing floorplan.
 The second work presented an efficient way to represent
slicing floorplans.
 The third work performs floorplanning for soft blocks
with the integer linear programming (ILP) approach.

Polish Expression (1/8)


 Modules are called as blocks, when it is assigned an
appropriate area and aspect ratio.
 Blocks are usually classified as 'soft' and 'hard' blocks.
 In hard blocks, the area and aspect ratio of the blocks are
fixed
 In soft blocks, the area is fixed but aspect ratio could
vary.

Polish Expression (2/8)


Polish expression

Polish Expression (3/8)


Practical Problems in VLSI Physical Design Polish Expression (4/8)
Points to remember
 One – to – One corresponding between slicing tree and
polish expression.
 Floorplan may have multiple slicing trees.
 Which means a floorplan may have many representations
(polish expressions)
 There is need for a Normalized Polish Expression (NPE).

Polish Expression (5/8)


Wong-Liu algorithm (Normalized polish expression)
 Wong and Liu presented a method named Normalized Polish
Expression to represent slicing floorplans.
 The normalized polish expression corresponds to the post-
order traversal of the slicing tree and satisfies the following
properties:
§ Each block appears exactly once in the string.
§ The number of operands is larger than the number of operators at all
positions in the string, which is called the “balloting property”.
§ There are no consecutive operators of the same type in the string,
which is called the “normality property.”
1. This normalized polish expression has 1-to-1 correspondence
to a slicing floorplan so that we can obtain a unique slicing
floorplan from a normalized polish expression, vice versa.

Polish Expression (6/8)


There are three types of moves:
M1 is swapping two adjacent operands.

M2 is complementing some chain.

M3 is swapping a pair of adjacent operand and operator.

A chain is a set of consecutive operators in a polish

expression, and its complementation involves swapping H


and V in the chain.
 At each move we randomly select one of these three types

and randomly choose a pair or chain.


In case of M3, we examine if the balloting and normality

properties are violated.

Practical Problems in VLSI Physical Design Polish Expression (7/8)


Normalized Polish Expression
 Draw slicing floorplan based on:
 Initial PE: P1 = 25V1H374VH6V8VH
 Dimensions: (2,4), (1,3), (3,3), (3,5), (3,2), (5,3), (1,2), (2,4)

Practical Problems in VLSI Physical Design Polish Expression (8/8)


M1 Move
 Swap module 3 and 7 in P1 = 25V1H374VH6V8VH
 We get: P2 = 25V1H734VH6V8VH
 Area changed from 11 × 15 to 13 × 14

Practical Problems in VLSI Physical Design Polish Expression (9/8)


Change on Floorplan

Practical Problems in VLSI Physical Design Polish Expression (10/8)


M2 Move
 Complement last chain in P2 = 25V1H734VH6V8VH
 We get: P3 = 25V1H734VH6V8HV
 Area changed from 13 × 14 to 15 × 11

Practical Problems in VLSI Physical Design Polish Expression (11/8)


Change on Floorplan

Practical Problems in VLSI Physical Design Polish Expression (12/8)


M3 Move
 Swaps 6 and V in P3 = 25V1H734VH6V8HV
 We get: P4 = 25V1H734VHV68HV
 Area changed from 15 × 11 to 15 × 7

Practical Problems in VLSI Physical Design Polish Expression (13/8)


Change on Floorplan

Practical Problems in VLSI Physical Design Polish Expression (14/8)


Initial Temperature Calculation
 What is average change on cost function?
 Initial temperature with acceptance probability 0.9?

Practical Problems in VLSI Physical Design Polish Expression (15/8)

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