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DMA (Direct Memory Access)

DMA (Direct Memory Access) allows certain hardware subsystems to access main system memory independently of the CPU. Without DMA, the CPU has to manage all read and write operations to memory, occupying it fully for the duration. With DMA, the CPU initiates the transfer and then performs other tasks while the transfer is in progress, receiving an interrupt when done. This allows faster transfer rates than CPU-managed I/O, freeing up the CPU. The DMA controller includes registers that control the address, transfer size and other settings of the memory access.

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67 views15 pages

DMA (Direct Memory Access)

DMA (Direct Memory Access) allows certain hardware subsystems to access main system memory independently of the CPU. Without DMA, the CPU has to manage all read and write operations to memory, occupying it fully for the duration. With DMA, the CPU initiates the transfer and then performs other tasks while the transfer is in progress, receiving an interrupt when done. This allows faster transfer rates than CPU-managed I/O, freeing up the CPU. The DMA controller includes registers that control the address, transfer size and other settings of the memory access.

Uploaded by

Mohammed Samiyan M
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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DMA(Direct Memory Access)

- Samiyan
Introduction
 Direct memory access (DMA) is a feature of computer systems that allows
certain hardware subsystems to access main system memory (
random-access memory) independent of the central processing unit (CPU).
 Without DMA, when the CPU is using programmed input/output, it is
typically fully occupied for the entire duration of the read or write
operation, and is thus unavailable to perform other work.
 With DMA, the CPU first initiates the transfer, then it does other operations
while the transfer is in progress, and it finally receives an interrupt from the
DMA controller (DMAC) when the operation is done.
 This feature is useful at any time that the CPU cannot keep up with the rate
of data transfer, or when the CPU needs to perform work while waiting for
a relatively slow I/O data transfer.
Why we need DMA
 Whenever we want to perform any operation related to memory the CPU has
to take care of it. Consider we have a data that we want to store into the
memory. Then the CPU takes the data from the CPU and then stores into the
memory. But the i/o peripherals speed is relatively slow as compared to the
CPU speed and it consumes time i.e, 1 cycle and then it stores data to
memory for that also 1 cycle is required.
 DMA takes control over this operation by providing direct access to memory
which will take only one cycle to complete the operation
Operation of DMA
Architecture of DMA
Registers and their fields
 Address of each register and register field
description is given below,
Test bench Architecture of DMA
Writing reg class for INTR
Cont,.
 Similarly we do for all the register’s
Writing RAL model
Complete Sequence Code
Accessing registers with RAL
Writing adapter class
Writing register model and adapter in
environment
Reference
 https://verificationguide.com/uvm-ral-example/
uvm-ral-example-dma
/
 https://www.edaplayground.com/x/3zes

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