Chapter 4: Data Movement Instructions

Chapter 4: Data Movement Instructions
Introduction
• This section concentrates on the data movement
instructions.
• The data movement instructions include MOV,
MOVSX, MOVZX, PUSH, POP, BSWAP, XCHG, XLAT,
IN, OUT, LEA,LDS, LES.
• String instructions: MOVS, LODS, STOS, INS, and
OUTS.
LOAD EFFECTIVE ADDRESS (LEA)
• Loads a 16- or 32-bit register with the offset address of the data specified
by the operand.
Example: 1. LEA AX, NUMB 2. . LEA EAX, NUMB
 1. Loads AX with the offset address of NUMB
 2. Loads EAX with the offset address of NUMB
• Using the OFFSET directive.

– OFFSET performs same function as LEA instruction if the operand is a
displacement
MOV AX, OFFSET NUMB; works same as LEA AX, NUMB
• LEA and MOV with OFFSET instructions are both the same length (3
bytes).
– OFFSET functions with, and is more efficient than LEA instruction, for
simple operands such as NUMB (immediate data)
– Microprocessor takes longer to execute the LEA BX,NUMB instruction
the MOV BX,OFFSET NUMB
• The MOV BX,OFFSET LIST instruction is actually assembled as a
move immediate instruction and is more efficient.
• Why is LEA (LOAD EFFECTIVE ADDRESS ) instruction available if
OFFSET accomplishes the same task?
 OFFSET only functions with simple operands such as LIST. It may
not be used for an operand such as [DI], LIST [SI], and so on
 By comparing LEA with MOV, we observe that LEA BX,[DI] loads
the offset address specified by [DI] (contents of DI) into the BX
register; MOV BX,[DI] loads the data stored at the memory
location addressed by [DI] into register BX.
Load-effective address instructions
4–3 LOAD EFFECTIVE ADDRESS
• LDS load a 16-bit register and the DS with the
content of memory locations that are determined
by the operands.
• Figure 4–17 illustrates an example LDS BX,[DI]
instruction.
Figure 4–17 The LDS BX,[DI] instruction loads register BX from addresses 11000H and 11001H
and register DS from locations 11002H and 11003H. This instruction is shown at the point just
before DS changes to 3000H and BX changes to 127AH.
4–4 STRING DATA TRANSFERS
• Five string data transfer instructions: LODS, STOS,
MOVS, INS, and OUTS.
• Each allows data transfers as a single byte, word,
or doubleword.
• Before the string instructions are presented, the
operation of the D flag-bit (direction), DI, and SI
must be understood as they apply to the string
instructions.
The Direction Flag
• The direction flag (D, located in the flag register)
selects the auto-increment or the auto-decrement
operation for the DI and SI registers during string
operations.
– used only with the string instructions
• The CLD instruction clears the D flag and the STD
instruction sets it .
– CLD instruction selects the auto-increment mode and
STD selects the auto-decrement mode
DI and SI
• During execution of string instruction, memory
accesses occur through DI and SI registers.
– DI offset address accesses data in the extra segment for
all string instructions that use it
– SI offset address accesses data by default
in the data segment
• Operating in 32-bit mode EDI and ESI registers are
used in place of DI and SI.
– this allows string using any memory location in
the entire 4G-byte protected mode address space
LODS
• Loads AL, AX, or EAX with data at segment offset
address indexed by the SI register.
• A 1 is added to or subtracted from SI for a byte-
sized LODS
• A 2 is added or subtracted for a word-sized LODS.
• A 4 is added or subtracted for a doubleword-sized
LODS.
Figure 4–18 shows the LODSW instruction.
Figure 4–18 The operation of the LODSW instruction if DS=1000H, D=0,11000H=32, 11001H =
A0. This instruction is shown after AX is loaded from memory, but before SI increments by 2.
STOS
• Stores AL, AX, or EAX at the extra segment
memory location addressed by the DI register.
• STOSB (stores a byte) stores the byte in AL at the
extra segment memory location addressed by DI.
• STOSW (stores a word) stores AX in the memory
location addressed by DI.
• After the byte (AL), word (AX), or doubleword
(EAX) is stored, contents of DI increment or
decrement.
STOS with a REP
• The repeat prefix (REP) is added to any string data
transfer instruction except LODS.
– REP prefix causes CX to decrement by 1 each time the
string instruction executes; after CX decrements, the string
instruction repeats
• If CX reaches a value of 0, the instruction terminates
and the program continues.
• If CX is loaded with 100 and a REP STOSB instruction
executes, the microprocessor automatically repeats
the STOSB 100 times.
MOVS
• Transfers a byte, word, or doubleword a data segment
addressed by SI to extra segment location addressed
by DI.
– pointers are incremented or decremented, as dictated by
the direction flag
• Only the source operand (SI), located in the data
segment may be overridden so another segment may
be used.
• The destination operand (DI) must always be located
in the extra segment.
INS
• Transfers a byte, word, or doubleword of data from
an I/O device into the extra segment memory location
addressed by the DI register.
– I/O address is contained in the DX register
• Useful for inputting a block of data from an external
I/O device directly into the memory.
• One application transfers data from a disk drive to
memory.
– disk drives are often considered and interfaced
as I/O devices in a computer system
• Three basic forms of the INS.
• INSB inputs data from an 8-bit I/O device and
stores it in a memory location indexed by DI.
• INSW instruction inputs 16-bit I/O data and stores
it in a word-sized memory location.
• INSD instruction inputs a doubleword.
• These instructions can be repeated using the REP
prefix
– allows an entire block of input data to be stored
in the memory from an I/O device
OUTS
• Transfers a byte, word, or doubleword of data
from the data segment memory location address
by SI to an I/O device.
– I/O device addressed by the DX register as with the INS
instruction
• In the 64-bit mode for Pentium 4 and Core2, there
is no 64-bit output
– but the address in RSI is 64 bits wide
4–5 MISCELLANEOUS DATA TRANSFER
INSTRUCTIONS
• Used in programs, data transfer instructions

detailed in this section are XCHG, XLAT, IN, OUT,
BSWAP, MOVSX, MOVZX, and CMOV.
• XCHG, XLAT, IN, OUT- available in 8086 processor

XCHG
• Exchanges contents of a register with any other
register or memory location.
– cannot exchange segment registers or
memory-to-memory data
• Exchanges are byte-, word-, or doubleword and
use any addressing mode except immediate
addressing.
• XCHG using the 16-bit AX register with another 16-
bit register, is most efficient exchange.
• When using a memory-addressing mode and the assembler, it
doesn’t matter which operand addresses memory. The XCHG AL,[DI]
instruction is identical to the XCHG [DI],AL instruction, as far as the
assembler is concerned.
XLAT
• Converts the contents of the AL register into a
number stored in a memory table.
– performs the direct table lookup technique often used
to convert one code to another
• An XLAT instruction first adds the contents of AL to
BX to form a memory address within the data
segment.
– copies the contents of this address into AL
– only instruction adding an 8-bit to a 16-bit number
Figure 4–19 The operation of the XLAT instruction at the point just before 6DH is loaded into
AL.
IN and OUT
• IN & OUT instructions perform I/O operations.
• Contents of AL, AX, or EAX are transferred only
between I/O device and microprocessor.
– an IN instruction transfers data from an external I/O
device into AL, AX, or EAX
– an OUT transfers data from AL, AX, or EAX to an
external I/O device
• Only the 80386 and above contain EAX
 Fixed port addressing
 Variable port addressing
• Often, instructions are stored in ROM.
– a fixed-port instruction stored in ROM has its port
number permanently fixed because of the nature of
read-only memory
• Two forms of I/O device (port) addressing:
• Fixed-port addressing allows data transfer
between AL, AX, or EAX using an 8-bit I/O port
address.
– port number follows the instruction’s opcode
• Variable-port addressing allows data transfers
between AL, AX, or EAX and a 16-bit port address.
– the I/O port number is stored in register DX,
which can be changed (varied) during the execution of
a program.
Figure 4–20 The signals found in the microprocessor-based system for an OUT 19H,AX
instruction.
BSWAP
• Takes the contents of any 32-bit register and
swaps the first byte with the fourth, and the
second with the third.
– BSWAP (byte swap) is available only in 80486–Pentium
4 microprocessors
• This instruction is used to convert data between
the big and little endian forms.
• In 64-bit operation for the Pentium 4, all 8 bytes in
the selected operand are swapped.
CMOV
• Many variations of the CMOV instruction.
– these move the data only if the condition is true
• CMOVZ instruction moves data only if the result from
some prior instruction was a zero.
– destination is limited to only a 16- or 32-bit register, but
the source can be a 16- or 32-bit register or memory
location
• Because this is a new instruction, you cannot use it
with the assembler unless the .686 switch is added to
the program
4–6 SEGMENT OVERRIDE PREFIX
• May be added to almost any instruction in any
memory-addressing mode
– allows the programmer to deviate from the
default segment
– only instructions that cannot be prefixed are jump and
call instructions using the code segment register for
address generation
– Additional byte appended to the front of an instruction
to select alternate segment register

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Chapter 4: Data Movement Instructions

• Using the OFFSET directive.

• Used in programs, data transfer instructions

• XCHG, XLAT, IN, OUT- available in 8086 processor

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