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Modern Microprocessor Systems EE-326: Muhammad Asim Butt Asim - Butt@umt - Edu.pk

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0% found this document useful (0 votes)
62 views

Modern Microprocessor Systems EE-326: Muhammad Asim Butt Asim - Butt@umt - Edu.pk

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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Modern Microprocessor Systems

EE-326
Muhammad Asim Butt
[email protected]
Surah Al-Hujurat
Course Information
 Instructor: Muhammad Asim Butt
[email protected]

 Course Web Page


 Link from the courses page
 http://moodle.umt.edu.pk/

 Book:
 The x86 PC Assembly Language, Design, and Interfacing, 5th
edition. By Muhammad Ali Mazidi, Janice gillispie Mazidi and
Danny Causey
Course Contents
• Pre-requisites
– Computer Organization

• Microprocessor (uP) systems


– Architecture
• Word Size, Organization, ALU etc
– Programming
• ISA, Assembly Language, Addressing Modes etc
– Interfacing
• Bus Structure, Interrupts, DMA

• Intel family of microprocessors


– 8086, 80286, 80386, 80486, Pentium Series, Core2

• Research Papers
– Recent trends in design of multi-core processors
Course Outcomes
 At the end of this course, students are expected to be
able to –

 differentiate between Intel family uP architectures

 interface memory and I/O systems to the uP

 develop software to use uP systems in meaningful


applications

 analyze, design and implement practical uP systems of


average complexity within a team
Grading Policy

 Assignments and quizzes 20 %


 Mid-Term Examination 30 %
 Final Examination 50 %
Assessments
 A minimum of Four assessments are required.

 These assessments will include quizzes and assignments.

 Due to rampant copying in assignments, every assignment


will be followed by a quiz from that assignment and the
quiz score will be the assignment score.
Assessments …
 No quiz will be less than TEN  minutes and more than
Twenty  minutes duration.

 Mid-term exam will be of exactly ONE HOUR duration


and will be conducted in WEEK 8. There will be no
lectures or lab sessions in the Mid-term Week.

 Final exam will be of 120 minutes duration.

 Attendance is mandatory, Students having below 80%


attendance will be awarded SA.
Course Learning Objectives
 At the end of this course, students are expected to be able
to:
 Identify distinguishing features of Intel family members ISA.
 Understand functions of modern memory & I/O systems and
interface them to the microprocessors
 Develop software to interface Intel microprocessors with
memory and IO.
 Analyze, design and implement practical systems of up to
average complexity within a team.
 Appreciate design issues related to multi-core processor
systems
Course Contents
Textbook (TB) /
Lecture Topics Reference (Ref) Readings

1 Introduction TB Ch 0
2-4 X86 microprocessor basics - registers, flags, addressing modes etc TB 1.1 – 1.7

5–6 Assembly language programming – directives, control, arithmetic, logic instructions TB 2.1 – 2.6, 3.1 – 3.6

7–8 8088, 80286 processors hardware TB 9.1 – 9.4

9 – 12 Memory - types & interfacing TB 10.1 – 10.5

13 – 14 IO interfacing I – 8255, motor. TB 11.1 – 11.4

Mid Term Exam (8th Week)


17 - 18 IO interfacing II – ADC, sensors, 8253 timer TB 12.1 – 12.4, 13.1 – 13.3

19 -20 Interrupts TB 14.1 – 14.4

21 DMA TB 15.1 – 15.3

22 Serial Communication (UART) TB 17.1 – 17.2

23 – 24 Memory Hierarchy & Cache TB 22.1 – 22.4

25 Pentium Processors TB 23.1 – 23.5

26 64-bit Processors TB 24.1 – 24.2

27 – 29 Buses – ISA & PCI TB 26.1 – 26.3

30 USB TB 27.1 – 27.3

Final Term Exam (Comprehensive)


Lab Work
PIC microcontroller development board
Microprocessor (uP) Systems
Microprocessor Vs Microcontroller
Project Ideas
• Simple Control Application
– Security systems, switching automation
• Games
– VGA, LED, human response
• Robots
– Unmanned smart vehicles
• Communication links
– GSM, RF
• Control Systems
– Inverted pendulum, speed control, ABS, motor drives
HISTORY

• Mechanical computer age began with the


advent of the abacus in 500 B.C.

• This first mechanical calculator remained


unchanged until 1642, when Blaise Pascal
improved it.
EE-326 Modern Microprocessor Systems

1832
HISTORY (cont.)

• The first electronic calculating machine was


developed during World War II by Konrad
Zuse, an early pioneer of digital electronics.
• The Z3 was used in aircraft and missile design
for the German war effort.
• The first electronic computer, which used
vacuum tubes, was placed into operation in
1943 to break secret German military codes.
HISTORY (cont.)

• The first electronic computer system, the


Colossus, was invented by Alan Turing.
• Its only problem was that the program was
fixed and could not be changed.
• The first general-purpose, programmable
electronic computer system was developed in
1946 at the University of Pennsylvania.
• This first modern computer was called the
ENIAC (Electronics Numerical Integrator and
Calculator).
HISTORY ….
EE-326 Modern Microprocessor Systems
 “Solid state” era begins in 1948 with invention of
transistor
EE-326 Modern Microprocessor Systems
 1958: First Integrated Circuit (IC)
EE-326 Modern Microprocessor Systems
80x86 Evolution
 4004:
 􀂄 4-bit microprocessor.
 􀂄 4KB main memory.
 􀂄 45 instructions.
 􀂄 PMOS technology.
 􀂄 50 KIPS
 8008: (1971)
 􀂄 8-bit version of 4004.
 􀂄 16KB main memory.
 􀂄 48 instructions.
 􀂄 NMOS technology.
 8080: (1973)
 􀂄 8-bit microprocessor.
 􀂄 64KB main memory.
 􀂄 2 microseconds clock cycle
80x86 Evolution

 8085: (1977)
 􀂄 8-bit microprocessor - upgraded version of the 8080.
 􀂄 64KB main memory.
 􀂄 1.3 microseconds clock cycle time; 769,230 instructions/sec.
 􀂄 246 instructions.
 􀂄 Intel sold 100 million copies of this 8-bit microprocessor.
 8086: (1978) 8088 (1979)
 􀂄 16-bit microprocessor.
 􀂄 1MB main memory.
 􀂄 2.5 MIPS (400 ns).
 􀂄 4- or 6-byte instruction cache.
 􀂄 Other improvements included more registers and additional instructions.
 80286: (1983)
 􀂄 16-bit microprocessor very similar in instruction set to the 8086.
 􀂄 16MB main memory.
 􀂄 4.0 MIPS (250 ns/8MHz).
BRIEF HISTORY OF THE x86 FAMILY
80286, 80386, and 80486
 Intel introduced the 80286 in 1982, which IBM picked up for
the design of the PC AT.
 16-bit internal & external data buses.
 24 address lines, for 16mb memory. (224 = 16mb)
 Virtual memory.

• 80286 can operate in one of two modes:


– Real mode - a faster 8088/8086 with the same maximum of 1 megabyte of memory.
– Protected mode - which allows for 16M of memory.
• Also capable of protecting the operating system & programs from
accidental or deliberate destruction by a user.
 80386: (1986)
 􀂄 32-bit microprocessor.
 􀂄 4GB main memory.
 􀂄 12-33MHz.
 􀂄 Memory management unit added.
 􀂄 Variations: DX, EX, SL, SLC (cache) and SX.
 80386SX: 16MB through a 16-bit data bus and 24 bit address bus.
 80486: (1989)
 􀂄 32-bit microprocessor, 32-bit data bus and 32-bit address bus.
 􀂄 4GB main memory.
 􀂄 20-50MHz. Later at 66 and 100MHz
 􀂄 Incorporated an 80386-like microprocessor, 80387-like floating point coprocessor
 and an 8K byte cache on one package.
 􀂄 About half of the instructions executed in 1 clock instead of 2 on the 386.
 􀂄 Variations: SX, DX2, DX4.
 DX2: Double clocked version:
 66MHz clock cycle time with memory transfers at 33MHz.
 Since general-purpose processors could not handle
mathematical calculations rapidly, Intel introduced numeric data
processing chips.
 Math coprocessors, such as 8087, 80287, 80387.

 Cache memory is static RAM with a very fast access time.


BRIEF HISTORY OF THE x86 FAMILY
80286, 80386, and 80486
 All programs written for the 8088/86 will run on
286, 386, and 486 computers.
 Pentium IV: (2002)
 􀂄 1.4 to 1.9GHz and the latest at 3.20 GHz and 3.46GHz (Hyper-Threading)!
 􀂄 1MB/512KB/256KB L2 cache.
 􀂄 800 MHz (about 6.4GB/s)/533 MHz (4.3 GB/s)/ 400MHz (3.2 GB/s) system bus.
 􀂄1066 MHz front side bus just available.
 􀂄Specialized for streaming video, game and DVD applications (144 new SIMD 128-bit
 instructions).
 􀂄 0.13um, more than 55 million transistors, .
 􀂄Newer ones are in 90nm transistors, >125 million possible
 Pentium D, Core 2 Duo, Core Duo, Core 2 Extreme Edition: (2005-2006)
 􀂄 Dual processing cores
 􀂄 Upto 4MB L2 cache and 1066 MHz FSB
 􀂄 65 nm transistors
 Refer to the following URL for more details:
 http://www.intel.com/design/
 Clock frequencies seemed to have peaked.
 Surge to multiple cores has begun.

 Memory speed a consideration.


 speed of dynamic RAM memory has not changed for many years.
 Push to static RAM memory will eventually. increase the
performance of the PC.
 main problem with large static RAM is heat
 static RAM operates 50 times faster than dynamic RAM
1.1 BRIEF HISTORY OF THE x86 FAMILY
Intel 64 Architecture

 Intel has selected Itanium® as the new brand name for the
first product in its 64-bit family of processors.
 Formerly called Merced.
 The evolution of microprocessors is increasingly
influenced by the evolution of the Internet.
 Itanium® architecture is designed to meet Internet-driven needs
for servers & high-performance workstations.
 Itanium® will have the ability to execute many instructions
simultaneously, plus extremely large memory capabilities.
 Speed of mass storage another problem.
 transfer speed of hard disk drives has changed little in past few years
 new technology needed for mass storage
 Flash memory could be solution.
 write speed comparable to hard disk memory
 Flash memory could store the operation system for common
applications.
 would allow operating system to load in a second or two instead of
many seconds now required
Conceptual views of the Pentium Pro, Pentium II, Pentium III,
Pentium 4, and Core2 microprocessors.

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