CS252 Graduate Computer Architecture
CS252 Graduate Computer Architecture
• Self-assembly of components
– DNA serves as substrate
– Attach active elements in middle of components.
– Final step – metal deposited over DNA
Active Region
Bonding
DNA
Active Region
• Other interesting structures could be built
South
• Particles like Protons have an intrinsic “Spin”
when defined with respect to an external
magnetic field
• Quantum effect gives “1” and “0”:
– Either spin is “UP” or “DOWN” nothing between
Single Spin
Control Gates
Inter-bit
Control Gates
Phosphorus
Impurity Atoms
Light-Years?
\ 1\ \ k\
k/ / k/ x /
k r 1 k
\ w\
w
r y/ x /
r 1 w 0 y
Quantum ( ) w\
x/
Fourier w0
Transform 0 1 k
r r r
• Finally: Perform measurement
– Find out r with high probability
– Get |y>|aw’> where y is of form k/r and w’ is related
5/11/2009 cs252-S09, Lecture 28 13
ION Trap Quantum Computer:
Promising technology
Top
Cross-
Sectional
View
Two-Qubit Gate
• Major Components
- Data = an ion
- Gate = a location
Q1
• Ballistic Movement
- Apply pulse sequences to electrodes
- Electrostatic forces move ion
- Intersections similar, but more
complicated pulse sequences
Q2
One-Qubit R Two-Qubit
Gate R Gate
Q4 Q5
1.0E-03
Qubit Error
1.0E-08
0 16 32 48 64
Distance Moved in Gates
One-Qubit Two-Qubit
Gate Gate
Q2 Q3
R EPRR Pair
One-Qubit R Two-Qubit
Gate Generators Gate
R
Q4 Q5
STRONGER
EPR Qubits EntanglementEPR Qubits
P G P
T G T G T G T G T G T
• Positive Features
- T node linking not on critical path
- Pre-purification (Link Amplification): part of link setup
P P P P
G G G G
Gate Gate Gate Gate
T G T G T G T
P P P P
Gate Gate Gate Gate
Operations
hardware involving
data qubits
time
Ancilla encoding
700000
600000
500000
400000
300000
200000
100000
0
1 10 100 1000
Encoded Ancilla Bandwidth Available (Ancillae per ms)
In-place In-place
Prep Prep
5/11/2009 cs252-S09, Lecture 28 28
Idealized Qalypso Architecture
• Dense data region
– Data qubits only
– Local communication
• Shared Ancilla Factories
– Distributed to data as needed
– Fully multiplexed to all data
– Output ports ( ): close to data
– Input ports ( ): may be far from
data, since recycled qubits have
irrelevant state
• Goals
– Design ancilla factories
– Answer Question: How much hardware is needed for ancilla
generation to run at the speed of data?