Introduction

Lecture 1
Low Power VLSI Design
Needs for Low Power VLSI Chips

 Power dissipation was neglected due to

 Low device density
 Low operating frequency
 Now it is important issue due to
 High device density
 High operating frequency
 Proliferation of portable consumer electronics
 Concerns on Environments and energy sources
Moore’s Law

In 1965, Gordon Moore noted that the

number of transistors on a chip doubled
every 18 to 24 months.
He made a prediction that semiconductor
technology will double its effectiveness every
18 months
 L O G2 O F T H E N U M B E R O F
C O M P O N E N T S P E R IN T E G R A T E D FU N C T IO N

0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

1959
1960
Moore’s Law

1961
1962

Electronics, April 19, 1965.

1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
Evolution in Complexity
Transistor Counts
1 Billion
K Transistors
1,000,000

100,000
Pentium® III
10,000 Pentium® II
Pentium® Pro
1,000 Pentium®
i486
100 i386
80286
10 8086
Source: Intel
1
1975 1980 1985 1990 1995 2000 2005 2010
Projected

Courtesy, Intel
Moore’s law in Microprocessors

1000

100 2X growth in 1.96 years!

Transistors (MT)

10
P6
Pentium® proc
1 486
386
0.1 286
8085 8086
0.01 8080
8008
4004
0.001
1970 1980 1990 2000 2010
Year
Transistors on Lead Microprocessors double every 2 years

Courtesy, Intel
Die Size Growth
100
Die size (mm)

P6
486 Pentium ® proc
10 386
286
8080 8086
8085 ~7% growth per year
8008
4004 ~2X growth in 10 years

1
1970 1980 1990 2000 2010
Year

Die size grows by 14% to satisfy Moore’s Law

Courtesy, Intel
Frequency
10000
Doubles every
1000
2 years
Frequency (Mhz)

100 P6
Pentium ® proc
486
10 8085 386
8086 286
1 8080
8008
4004
0.1
1970 1980 1990 2000 2010
Year
Lead Microprocessors frequency doubles every 2 years

Courtesy, Intel
Power Dissipation
100

P6
Pentium ® proc
Power (Watts)

10
486
8086 286
386
8085
1 8080
8008
4004

0.1
1971 1974 1978 1985 1992 2000
Year

Lead Microprocessors power continues to increase

Courtesy, Intel
Power will be a major problem
100000
18KW
10000 5KW
1.5KW
Power (Watts)

1000 500W
Pentium® proc
100
286 486
10 8086 386
8085
8080
8008
1 4004

0.1
1971 1974 1978 1985 1992 2000 2004 2008
Year

Power delivery and dissipation will be prohibitive

Courtesy, Intel
Power density
Sun Surface
10000
Rocket
Power Density (W/cm2)

Nozzle
1000
Nuclear
Reactor
100

8086
10 4004 Hot Plate P6
8008 8085 386 Pentium® proc
286 486
8080
1
1970 1980 1990 2000 2010
Year

Power density too high to keep junctions at low temp

Courtesy, Intel
Not Only Microprocessors

Cell
Phone
Small Power
Signal RF RF

Digital Cellular Market

(Phones Shipped) Power
Management

1996 1997 1998 1999 2000

Units 48M 86M 162M 260M 435M Analog
Baseband

Digital Baseband
(DSP + MCU)
(data from Texas Instruments)
Battery

 Portable consumer electronics powered by battery

 Battery is heavy and big
 Energy density barely doubles in several years
 Safety concern: the energy density is approaching
that of explosive chemicals.

The battery technology alone will not solve the low power problem
Reliability and Cooling Costs

 High power dissipation  high temperature

 malfunction
 High performance microprocessors: ~50
Watts (a hand-held soldering iron)
 Packaging cost and cooling cost: fans
 Power supply rails: high transient current
(e.g. 3A).
Environmental Concerns

 Office automation equipment

 5% of total US commercial energy in 1993
 10% of total US commercial energy in 2000
 Electricity generation air pollution and
consumption of energy sources
 Syllabus

 Course Description
 to introduce power dissipation mechanism and
low power techniques in VLSI CMOS circuits to
graduate students.
 The instructor will present general low power
design principles in textbook, as well as specific
research projects in published papers.
 The students will learn by reading technical
papers, doing projects and writing term papers.
 Syllabus

 Materials
 “CMOS VLSI Design: A circuits and systems
perspective,” 3rd Edition, Neil H.E. Weste and
David Harris, Addison Wesley, 2005.
ISBN: 0-321-14901-7.
 “Practical Low Power Digital VLSI Design,” Gary K.
Yeap, Kluwer Academic Publishers, 1998.
ISBN: 0-7923-8009-6.
 Technical Papers (will be posted on course
website)
 Course Outline
 CMOS logic
 MOS transistor theory
 Power dissipation in CMOS digital circuits
 Low power digital CMOS VLSI design (Overview)
 Low power design at circuit level
 Low power design at logic level
 Low power design for sequential circuit
 Architecture for low power
 Special techniques:
1) Adaptive supply voltage
2) Pass transistor logic
3) Adiabatic logic
4) Asynchronous logic
 Course management

 Instructor: Weidong Kuang

 Office: Engr 3.270, Office hours: MW 10:00 – 11:50 AM
 Email: [email protected], Phone: 316-7133
 http://www.engr.panam.edu/~kuangw/courses
 Prerequisites:
 solid-state devices (ELEE4328) or Introduction to VLSI
(ELEE4375) or equivalent
 Grading: Homework 20%, Project 50%, Final 30%