PRESIDENCY UNIVERISTY, BENGALURU

School of Engineering

Department of Computer Science & Engineering

Microprocessors and Microcontroller

CSE 206

IV Semester 2019-20
Microprocessor & Microcontrollers
Addressing Modes
&
Instruction Set
8086 Microprocessor Introduction
Program
A set of instructions written to solve a
problem.

Instruction
Directions which a microprocessor
follows to execute a task or part of a
task.

Computer language

High Level Low Level

Machine Language Assembly Language

 Binary bits  English Alphabets

 ‘Mnemonics’
 Assembler Mnemonics
 Machine Language

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Addressing Modes
8086 Microprocessor Addressing Modes

Every instruction of a program has to operate on a data.

The different ways in which a source operand is denoted in an instruction are
known as addressing modes.

1. Register Addressing Group I : Addressing modes for

2. Immediate Addressing register and immediate data

3. Direct Addressing
4. Register Indirect Addressing
5. Based Addressing Group II : Addressing modes for memory
6. Indexed Addressing data
7. Based Index Addressing
8. String Addressing

9. Direct I/O port Addressing Group III : Addressing modes for I/O
10. Indirect I/O port Addressing ports

11. Relative Addressing Group IV : Relative Addressing mode

12. Implied Addressing Group V : Implied Addressing mode

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 Group I : Addressing modes for
8086 Microprocessor Addressing Modes register and immediate data

1. Register Addressing The instruction will specify the name of the

register which holds the data to be operated by
2. Immediate Addressing
the instruction.
3. Direct Addressing
Example:
4. Register Indirect Addressing
MOV CL, DH
5. Based Addressing

6. Indexed Addressing The content of 8-bit register DH is moved to

another 8-bit register CL
7. Based Index Addressing
(CL)  (DH)
8. String Addressing

9. Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing

12. Implied Addressing

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 Group I : Addressing modes for
8086 Microprocessor Addressing Modes register and immediate data

1. Register Addressing In immediate addressing mode, an 8-bit or 16-bit

data is specified as part of the instruction
2. Immediate Addressing

3. Direct Addressing Example:

4. Register Indirect Addressing MOV DL, 08H

5. Based Addressing
The 8-bit data (08H) given in the instruction is
6. Indexed Addressing moved to DL
7. Based Index Addressing (DL)  08H
8. String Addressing

9. Direct I/O port Addressing MOV AX, 0A9FH

10. Indirect I/O port Addressing
The 16-bit data (0A9FH) given in the instruction is
11. Relative Addressing moved to AX register
12. Implied Addressing
(AX)  0A9FH

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8086 Microprocessor Addressing Modes: Memory Access

Offset Value (16 bits)

Segment Register (16 bits) 0000

Adder

Physical Address (20 Bits)

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8086 Microprocessor Addressing Modes: Memory Access

20 Address lines  8086 can address up to

220 = 1M bytes of memory

However, the largest register is only 16 bits

Physical Address will have to be calculated Physical

Address : Actual address of a byte in memory. i.e. the
value which goes out onto the address bus.

Memory Address represented in the form –

Seg : Offset (Eg - 89AB:F012)

Each time the processor wants to access memory, it

takes the contents of a segment register, shifts it one 16 bytes of
hexadecimal place to the left (same as multiplying by contiguous memory
1610), then add the required offset to form the 20- bit
address
89AB : F012  89AB  89AB0 (Paragraph to byte  89AB x 10 = 89AB0)
F012  0F012 (Offset is already in byte unit)
+ -------
98AC2 (The absolute address)

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8086 Microprocessor Addressing Modes: Memory Access

To access memory we use these four registers:  BX,

SI, DI, BP

Combining these registers inside [ ] symbols, we can

get different memory locations (Effective Address,
EA)

Supported combinations:

[BX + SI] [SI] [BX + SI + d8]

[BX + DI] [DI] [BX + DI + d8]
[BP + SI] d16 (variable offset only) [BP + SI + d8]
[BP + DI] [BX] [BP + DI + d8]

[SI + d8] [BX + SI + d16] [SI + d16]

[DI + d8] [BX + DI + d16]  [DI + d16]
[BP + d8] [BP + SI + d16] [BP + d16]
[BX + d8] [BP + DI + d16] [BX + d16]

BX SI
+ disp
BP DI

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 Group II : Addressing modes
8086 Microprocessor Addressing Modes for memory data

1. Register Addressing Here, the effective address of the memory

location at which the data operand is stored is
2. Immediate Addressing given in the instruction.
3. Direct Addressing
The effective address is just a 16-bit number
4. Register Indirect Addressing written directly in the instruction.
5. Based Addressing
Example:
6. Indexed Addressing
MOV BX, [1354H]
7. Based Index Addressing MOV BL, [0400H]

8. String Addressing The square brackets around the 1354H denotes

the contents of the memory location. When
9. Direct I/O port Addressing
executed, this instruction will copy the contents
10. Indirect I/O port Addressing of the memory location into BX register.

11. Relative Addressing

This addressing mode is called direct because the
12. Implied Addressing displacement of the operand from the segment
base is specified directly in the instruction.

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 Group II : Addressing modes
8086 Microprocessor Addressing Modes for memory data

1. Register Addressing In Register indirect addressing, name of the

register which holds the effective address (EA) will
2. Immediate Addressing be specified in the instruction.
3. Direct Addressing Registers used to hold EA are any of the following
4. Register Indirect Addressing registers:

5. Based Addressing BX, BP, DI and SI.

6. Indexed Addressing Content of the DS register is used for base address

calculation.
7. Based Index Addressing
Note : Register/ memory
Example:
8. String Addressing enclosed in brackets refer
to content of register/
MOV CX, [BX]
9. Direct I/O port Addressing memory
Operations:
10. Indirect I/O port Addressing
EA = (BX)
11. Relative Addressing BA = (DS) x 1610
MA = BA + EA
12. Implied Addressing
(CX)  (MA) or,
(CL)  (MA)
(CH)  (MA +1)

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 Group II : Addressing modes
8086 Microprocessor Addressing Modes for memory data

1. Register Addressing In Based Addressing, BX or BP is used to hold the

base value for effective address and a signed 8-bit or
2. Immediate Addressing unsigned 16-bit displacement will be specified in the
instruction.
3. Direct Addressing
In case of 8-bit displacement, it is sign extended to
4. Register Indirect Addressing
16-bit before adding to the base value.
5. Based Addressing
When BX holds the base value of EA, 20-bit physical
6. Indexed Addressing address is calculated from BX and DS.

7. Based Index Addressing When BP holds the base value of EA, BP and SS is
used.
8. String Addressing
Example:
9. Direct I/O port Addressing
MOV AX, [BX + 08H]
10. Indirect I/O port Addressing Operations:
0008H  08H (Sign extended)
11. Relative Addressing EA = (BX) + 0008H
12. Implied Addressing BA = (DS) x 1610
MA = BA + EA
(AX)  (MA) or,
(AL)  (MA)
(AH)  (MA + 1)

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 Group II : Addressing modes
8086 Microprocessor Addressing Modes for memory data

1. Register Addressing SI or DI register is used to hold an index value for

memory data and a signed 8-bit or unsigned 16-bit
2. Immediate Addressing displacement will be specified in the instruction.
3. Direct Addressing Displacement is added to the index value in SI or DI
register to obtain the EA.
4. Register Indirect Addressing

5. Based Addressing In case of 8-bit displacement, it is sign extended to

16-bit before adding to the base value.
6. Indexed Addressing
Example:
7. Based Index Addressing
MOV CX, [SI + 0A2H]
8. String Addressing
Operations:
9. Direct I/O port Addressing
FFA2H  A2H (Sign extended)
10. Indirect I/O port Addressing EA = (SI) + FFA2H
BA = (DS) x 1610
11. Relative Addressing MA = BA + EA
(CX)  (MA) or,
12. Implied Addressing (CL)  (MA)
(CH)  (MA + 1)

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 Group II : Addressing modes
8086 Microprocessor Addressing Modes for memory data

1. Register Addressing In Based Index Addressing, the effective address is

computed from the sum of a base register (BX or BP),
2. Immediate Addressing
an index register (SI or DI) and a displacement.
3. Direct Addressing
Example:
4. Register Indirect Addressing
MOV DX, [BX + SI + 0AH]
5. Based Addressing

6. Indexed Addressing Operations:

7. Based Index Addressing 000AH  0AH (Sign extended)

8. String Addressing
EA = (BX) + (SI) + 000AH
9. Direct I/O port Addressing BA = (DS) x 1610
10. Indirect I/O port Addressing MA = BA + EA

11. Relative Addressing (DX)  (MA) or,

12. Implied Addressing
(DL)  (MA)
(DH)  (MA + 1)

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 Group II : Addressing modes
8086 Microprocessor Addressing Modes for memory data

1. Register Addressing Employed in string operations to operate on string

data.
2. Immediate Addressing
The effective address (EA) of source data is stored in
3. Direct Addressing SI register and the EA of destination is stored in DI
register.
4. Register Indirect Addressing
Segment register for calculating base address of
5. Based Addressing
source data is DS and that of the destination data is
6. Indexed Addressing ES

7. Based Index Addressing Example: MOVS BYTE

Operations:
8. String Addressing
Calculation of source memory location:
9. Direct I/O port Addressing
EA = (SI) BA = (DS) x 1610 MA = BA + EA
10. Indirect I/O port Addressing Calculation of destination memory location:
11. Relative Addressing EAE = (DI) BAE = (ES) x 1610 MAE = BAE + EAE
12. Implied Addressing (MAE)  (MA)
If DF = 1, then (SI)  (SI) – 1 and (DI) = (DI) - 1
Note : Effective address of
the Extra segment register If DF = 0, then (SI)  (SI) +1 and (DI) = (DI) + 1

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 Group III : Addressing modes
8086 Microprocessor Addressing Modes for I/O Ports

1. Register Addressing These addressing modes are used to access data from
standard I/O mapped devices or ports.
2. Immediate Addressing
In direct port addressing mode, an 8-bit port address
3. Direct Addressing is directly specified in the instruction.

4. Register Indirect Addressing Example: IN AL, [09H]

Operations: PORTaddr = 09H
5. Based Addressing
(AL)  (PORT)
6. Indexed Addressing
Content of port with address 09H is
7. Based Index Addressing
moved to AL register
8. String Addressing In indirect port addressing mode, the instruction will
9. Direct I/O port Addressing specify the name of the register which holds the port
address. In 8086, the 16-bit port address is stored in
10. Indirect I/O port Addressing the DX register.
11. Relative Addressing Example: OUT [DX], AX

12. Implied Addressing Operations: PORTaddr = (DX)

(PORT)  (AX)
Content of AX is moved to port
whose address is specified by DX register.

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 Group IV : Relative Addressing
8086 Microprocessor Addressing Modes Mode

1. Register Addressing In this addressing mode, the effective address of a

program instruction is specified relative to
2. Immediate Addressing
Instruction Pointer (IP) by an 8-bit signed
3. Direct Addressing displacement.

4. Register Indirect Addressing Example: JZ 0AH

5. Based Addressing
Operations:
6. Indexed Addressing
000AH  0AH (sign extend)
7. Based Index Addressing

8. String Addressing If ZF = 1, then

9. Direct I/O port Addressing EA = (IP) + 000AH

10. Indirect I/O port Addressing
BA = (CS) x 1610
MA = BA + EA
11. Relative Addressing
If ZF = 1, then the program control jumps to
12. Implied Addressing
new address calculated above.

If ZF = 0, then next instruction of the program

is executed.

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 Group V : Implied Addressing
8086 Microprocessor Addressing Modes Mode

1. Register Addressing Instructions using this mode have no operands. The

instruction itself will specify the data to be operated
2. Immediate Addressing by the instruction.
3. Direct Addressing
Example: CLC
4. Register Indirect Addressing
This clears the carry flag to zero.
5. Based Addressing

6. Indexed Addressing

7. Based Index Addressing

8. String Addressing

9. Direct I/O port Addressing

10. Indirect I/O port Addressing

11. Relative Addressing

12. Implied Addressing

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INSTRUCTION SET
8086 Microprocessor Instruction Set

8086 supports 6 types of instructions.

1. Data Transfer Instructions

2. Arithmetic Instructions

3. Logical Instructions

4. String manipulation Instructions

5. Process Control Instructions

6. Control Transfer Instructions

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8086 Microprocessor Instruction Set

1. Data Transfer Instructions

Instructions that are used to transfer data/ address in to
registers, memory locations and I/O ports.

Generally involve two operands: Source operand and Destination

operand of the same size.

Source: Register or a memory location or an immediate data

Destination : Register or a memory location.

The size should be a either a byte or a word.

A 8-bit data can only be moved to 8-bit register/ memory and a

16-bit data can be moved to 16-bit register/ memory.

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8086 Microprocessor Addressing Modes 1. Data Transfer Instructions

1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …
MOV reg2/ mem, reg1/ mem
MOV reg2, reg1 (reg2)  (reg1)
MOV mem, reg1 (mem)  (reg1)
MOV reg2, mem (reg2)  (mem)
MOV reg/ mem, data
MOV reg, data (reg)  data
MOV mem, data (mem)  data
XCHG reg2/ mem, reg1
XCHG reg2, reg1 (reg2)  (reg1)
XCHG mem, reg1 (mem)  (reg1)

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8086 Microprocessor Addressing Modes 1. Data Transfer Instructions

1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …
PUSH reg16/ mem
(SP)  (SP) – 2
PUSH reg16 MA S = (SS) x 1610 + SP
(MA S ; MA S + 1)  (reg16)
(SP)  (SP) – 2
PUSH mem MA S = (SS) x 1610 + SP
(MA S ; MA S + 1)  (mem)
POP reg16/ mem
MA S = (SS) x 1610 + SP
POP reg16 (reg16)  (MA S ; MA S + 1)
(SP)  (SP) + 2
MA S = (SS) x 1610 + SP
POP mem (mem)  (MA S ; MA S + 1)
(SP)  (SP) + 2 27
8086 Microprocessor Addressing Modes 1. Data Transfer Instructions

1. Data Transfer Instructions

Mnemonics: MOV, XCHG, PUSH, POP, IN, OUT …

IN A, [DX] OUT [DX], A

PORTaddr = (DX) PORTaddr = (DX)

IN AL, [DX] OUT [DX], AL
(AL)  (PORT) (PORT)  (AL)
PORTaddr = (DX) PORTaddr = (DX)
IN AX, [DX] OUT [DX], AX
(AX)  (PORT) (PORT)  (AX)

IN A, addr8 OUT addr8, A

IN AL, addr8 (AL)  (addr8) OUT addr8, AL (addr8)  (AL)

IN AX, addr8 (AX)  (addr8) OUT addr8, AX (addr8)  (AX)

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8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
ADD reg2/ mem, reg1/mem
ADD reg2, reg1 (reg2)  (reg1) + (reg2)
ADD reg2, mem (reg2)  (reg2) + (mem)
ADD mem, reg1 (mem)  (mem)+(reg1)
ADD reg/mem, data
ADD reg, data (reg)  (reg)+ data
ADD mem, data (mem)  (mem)+data
ADD A, data
ADD AL, data8 (AL)  (AL) + data8
ADD AX, data16 (AX)  (AX) +data16

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8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
ADC reg2/ mem, reg1/mem
ADC reg2, reg1 (reg2)  (reg1) + (reg2)+CF
ADC reg2, mem (reg2)  (reg2) + (mem)+CF
ADC mem, reg1 (mem)  (mem)+(reg1)+CF
ADC reg/mem, data
ADC reg, data (reg)  (reg)+ data+CF
ADC mem, data (mem)  (mem)+data+CF
ADC A, data
ADC AL, data8 (AL)  (AL) + data8+CF
ADC AX, data16 (AX)  (AX) +data16+CF

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8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
SUB reg2/ mem, reg1/mem
SUB reg2, reg1 (reg2)  (reg1) - (reg2)
SUB reg2, mem (reg2)  (reg2) - (mem)
SUB mem, reg1 (mem)  (mem) - (reg1)
SUB reg/mem, data
SUB reg, data (reg)  (reg) - data
SUB mem, data (mem)  (mem) - data
SUB A, data
SUB AL, data8 (AL)  (AL) - data8
SUB AX, data16 (AX)  (AX) - data16

31
8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
SBB reg2/ mem, reg1/mem
SBB reg2, reg1 (reg2)  (reg1) - (reg2) - CF
SBB reg2, mem (reg2)  (reg2) - (mem)- CF
SBB mem, reg1 (mem)  (mem) - (reg1) –CF
SBB reg/mem, data
SBB reg, data (reg)  (reg) – data - CF
SBB mem, data (mem)  (mem) - data - CF
SBB A, data
SBB AL, data8 (AL)  (AL) - data8 - CF
SBB AX, data16 (AX)  (AX) - data16 - CF

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8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
INC reg/ mem

INC reg8 (reg8)  (reg8) + 1

INC reg16 (reg16)  (reg16) + 1

INC mem (mem)  (mem) + 1

DEC reg/ mem

DEC reg8 (reg8)  (reg8) - 1

DEC reg16 (reg16)  (reg16) - 1

DEC mem (mem)  (mem) – 1

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8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…

MUL reg/ mem

MUL reg For byte : (AX)  (AL) x (reg8)
For word : (DX)(AX)  (AX) x (reg16)
MUL mem For byte : (AX)  (AL) x (mem8)
For word : (DX)(AX)  (AX) x (mem16)
IMUL reg/ mem
IMUL reg For byte : (AX)  (AL) x (reg8)
For word : (DX)(AX)  (AX) x (reg16)
IMUL mem For byte : (AX)  (AX) x (mem8)
For word : (DX)(AX)  (AX) x (mem16)

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8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
DIV reg/ mem
DIV reg For 16-bit :- 8-bit :
(AL)  (AX) :- (reg8) Quotient
(AH)  (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :
(AX)  (DX)(AX) :- (reg16) Quotient
(DX)  (DX)(AX) MOD(reg16) Remainder
DIV mem For 16-bit :- 8-bit :
(AL)  (AX) :- (mem8) Quotient
(AH)  (AX) MOD(mem8) Remainder
For 32-bit :- 16-bit :
(AX)  (DX)(AX) :- (mem16) Quotient
(DX)  (DX)(AX) MOD(mem16) Remainder

35
8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
IDIV reg/ mem
IDIV reg For 16-bit :- 8-bit :
(AL)  (AX) :- (reg8) Quotient
(AH)  (AX) MOD(reg8) Remainder
For 32-bit :- 16-bit :
(AX)  (DX)(AX) :- (reg16) Quotient
(DX)  (DX)(AX) MOD(reg16) Remainder
IDIV mem For 16-bit :- 8-bit :
(AL)  (AX) :- (mem8) Quotient
(AH)  (AX) MOD(mem8) Remainder
For 32-bit :- 16-bit :
(AX)  (DX)(AX) :- (mem16) Quotient
(DX)  (DX)(AX) MOD(mem16) Remainder

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8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
CMP reg2/mem, reg1/ mem
Modify flags  (reg2) – (reg1)
If (reg2) > (reg1) then CF=0, ZF=0, SF=0
CMP reg2, reg1
If (reg2) < (reg1) then CF=1, ZF=0, SF=1
If (reg2) = (reg1) then CF=0, ZF=1, SF=0
Modify flags  (reg2) – (mem)
CMP reg2, mem If (reg2) > (mem) then CF=0, ZF=0, SF=0
If (reg2) < (mem) then CF=1, ZF=0, SF=1
If (reg2) = (mem) then CF=0, ZF=1, SF=0
Modify flags  (mem) – (reg1)
CMP mem, reg1 If (mem) > (reg1) then CF=0, ZF=0, SF=0
If (mem) < (reg1) then CF=1, ZF=0, SF=1
If (mem) = (reg1) then CF=0, ZF=1, SF=0

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8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
CMP reg/mem, data
Modify flags  (reg) – (data)

If (reg) > data then CF=0, ZF=0, SF=0

CMP reg, data
If (reg) < data then CF=1, ZF=0, SF=1

If (reg) = data then CF=0, ZF=1, SF=0

Modify flags  (mem) – (mem)

CMP mem, data If (mem) > data then CF=0, ZF=0, SF=0

If (mem) < data then CF=1, ZF=0, SF=1

If (mem) = data then CF=0, ZF=1, SF=0

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8086 Microprocessor Addressing Modes 2. Arithmetic Instructions

2. Arithmetic Instructions
Mnemonics: ADD, ADC, SUB, SBB, INC, DEC, MUL, DIV, CMP…
CMP A, data
Modify flags  (AL) – data8

If (AL) > data8 then CF=0, ZF=0, SF=0

CMP AL, data8
If (AL) < data8 then CF=1, ZF=0, SF=1

If (AL) = data8 then CF=0, ZF=1, SF=0

Modify flags  (AX) – data16

If (AX) > data16 then CF=0, ZF=0, SF=0

CMP AX, data16
If (mem) < data16 then CF=1, ZF=0, SF=1

If (mem) = data16 then CF=0, ZF=1, SF=0

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8086 Microprocessor Addressing Modes 3. Logical Instructions

2. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
AND A, data
AND AL, data8 (AL)  (AL) – data8

AND AX, data16 (AX)  (AX) – data16

AND reg/mem, data
AND reg, data (reg)  (reg) & data

AND mem, data (mem)  (mem) & data

AND reg2/mem, reg1/mem
AND reg2, reg1 (reg2)  (reg2) & (reg1)

AND reg2, mem (reg2)  (reg2) & (mem)

AND mem, reg1 (mem)  (mem) & (reg1)

8086 Microprocessor Addressing Modes 3. Logical Instructions

2. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
OR A, data
OR AL, data8 (AL)  (AL) – data8

OR AX, data16 (AX)  (AX) – data16

OR reg/mem, data
OR reg, data (reg)  (reg) & data

OR mem, data (mem)  (mem) & data

OR reg2/mem, reg1/mem
OR reg2, reg1 (reg2)  (reg2) & (reg1)

OR reg2, mem (reg2)  (reg2) & (mem)

OR mem, reg1 (mem)  (mem) & (reg1)

41
8086 Microprocessor Addressing Modes 3. Logical Instructions

2. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
XOR A, data
XOR AL, data8 (AL)  (AL) – data8

XOR AX, data16 (AX)  (AX) – data16

XOR reg/mem, data
XOR reg, data (reg)  (reg) & data

XOR mem, data (mem)  (mem) & data

XOR reg2/mem, reg1/mem
XOR reg2, reg1 (reg2)  (reg2) & (reg1)

XOR reg2, mem (reg2)  (reg2) & (mem)

XOR mem, reg1 (mem)  (mem) & (reg1)

42
8086 Microprocessor Addressing Modes 3. Logical Instructions

2. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
TEST A, data
TEST AL, data8 Modify flags  (AL) – data8

TEST AX, data16 Modify flags  (AX) – data16

TEST reg/mem, data
TEST reg, data Modify flags  (reg) & data

TEST mem, data Modify flags  (mem) & data

TEST reg2/mem, reg1/mem
TEST reg2, reg1 Modify flags  (reg2) & (reg1)

TEST reg2, mem Modify flags  (reg2) & (mem)

TEST mem, reg1 Modify flags  (mem) & (reg1)

43
8086 Microprocessor Addressing Modes 3. Logical Instructions

2. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
SHR reg/mem
SHR reg, 2
SHR reg
SHR reg, CL
SHR mem, 2
SHR mem
SHR mem, CL

44
8086 Microprocessor Addressing Modes 3. Logical Instructions

2. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
SHL reg/mem or SAL reg/mem
SHL reg, 2 or SAL reg, 2
SHL reg or SAL reg
SHL reg, CL or SAL reg, CL
SHL mem, 2 or SAL mem, 2
SHR mem or SAL mem
SHL mem, CL or SAL mem, CL

45
8086 Microprocessor Addressing Modes 3. Logical Instructions

2. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, RCL …
RCR reg/mem
RCR reg, 4
RCR reg
RCR reg, CL
RCR mem, 4
RCR mem
RCR mem, CL

46
8086 Microprocessor Addressing Modes 3. Logical Instructions

2. Logical Instructions
Mnemonics: AND, OR, XOR, TEST, SHR, SHL, RCR, ROL …
ROL reg/mem
ROL reg, 1
ROL reg
ROL reg, CL
ROL mem, 1
ROL mem
ROL mem, CL

47
 4. String Manipulation
8086 Microprocessor Addressing Modes Instructions

 String : Sequence of bytes or words

 8086 instruction set includes instruction for string movement,
comparison, scan, load and store.
 REP instruction prefix : used to repeat execution of string instructions
 String instructions end with S or SB or SW. S represents string, SB
string byte and SW string word.
 Offset or effective address of the source operand is stored in SI
register and that of the destination operand is stored in DI register.
 Depending on the status of DF, SI and DI registers are automatically
updated.
 DF = 0  SI and DI are incremented by 1 for byte and 2 for word.
 DF = 1  SI and DI are decremented by 1 for byte and 2 for word.

48
 4. String Manipulation
8086 Microprocessor Addressing Modes Instructions

4. String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
REP

REPZ/ REPE While CX  0 and ZF = 1, repeat execution of

string instruction and
(Repeat CMPS or SCAS until
ZF = 0) (CX)  (CX) – 1

REPNZ/ REPNE While CX  0 and ZF = 0, repeat execution of

string instruction and
(Repeat CMPS or SCAS until
ZF = 1) (CX)  (CX) - 1

49
 4. String Manipulation
8086 Microprocessor Addressing Modes Instructions

4. String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
MOVS
MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)

MOVSB (MAE)  (MA)

If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1

If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) - 1

MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)

MOVSW (MAE ; MAE + 1)  (MA; MA + 1)

If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2

If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2

50
 4. String Manipulation
8086 Microprocessor Addressing Modes Instructions

4. String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
Compare two string byte or string word
MA = (DS) x 1610 + (SI)

MAE = (ES) x 1610 + (DI)

Modify flags  (MA) - (MAE)

CMPS
If (MA) > (MAE), then CF = 0; ZF = 0; SF = 0
If (MA) < (MAE), then CF = 1; ZF = 0; SF = 1
If (MA) = (MAE), then CF = 0; ZF = 1; SF = 0
For byte operation
CMPSB If DF = 0, then (DI)  (DI) + 1; (SI)  (SI) + 1
If DF = 1, then (DI)  (DI) - 1; (SI)  (SI) – 1

CMPSW For word operation

If DF = 0, then (DI)  (DI) + 2; (SI)  (SI) + 2
If DF = 1, then (DI)  (DI) - 2; (SI)  (SI) - 2

51
 4. String Manipulation
8086 Microprocessor Addressing Modes Instructions

4. String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
Scan (compare) a string byte or word with accumulator
MAE = (ES) x 1610 + (DI)

Modify flags  (AL) - (MAE)

SCAS If (AL) > (MAE), then CF = 0; ZF = 0; SF = 0
If (AL) < (MAE), then CF = 1; ZF = 0; SF = 1
If (AL) = (MAE), then CF = 0; ZF = 1; SF = 0
For byte operation
SCASB If DF = 0, then (DI)  (DI) + 1
If DF = 1, then (DI)  (DI) – 1
For word operation
SCASW If DF = 0, then (DI)  (DI) + 2
If DF = 1, then (DI)  (DI) – 2

52
 4. String Manipulation
8086 Microprocessor Addressing Modes Instructions

4. String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
Load string byte in to AL or string word in to AX
LODS
MA = (DS) x 1610 + (SI)

(AL)  (MA)
LODSB
If DF = 0, then (SI)  (SI) + 1
If DF = 1, then (SI)  (SI) – 1
MA = (DS) x 1610 + (SI)

(AX)  (MA ; MA + 1)
LODSW
If DF = 0, then (SI)  (SI) + 2
If DF = 1, then (SI)  (SI) – 2

53
 4. String Manipulation
8086 Microprocessor Addressing Modes Instructions

4. String Manipulation Instructions

Mnemonics: REP, MOVS, CMPS, SCAS, LODS, STOS
Store byte from AL or word from AX in to string
STOS
MAE = (ES) x 1610 + (DI)

(MAE)  (AL)
STOSB
If DF = 0, then (DI)  (DI) + 1

If DF = 1, then (DI)  (DI) – 1

MAE = (ES) x 1610 + (DI)

(MAE ; MAE + 1 )  (AX)

STOSW
If DF = 0, then (DI)  (DI) + 2

If DF = 1, then (DI)  (DI) – 2

54
8086 Microprocessor Addressing Modes 5. Process Control Instructions

5. Process Control Instructions

Mnemonics Explanation
STC Set CF  1
CLC Clear CF  0
CMC Complement carry CF  CF/
STD Set direction flag DF  1
CLD Clear direction flag DF  0
STI Set interrupt enable flag IF  1
CLI Clear interrupt enable flag IF  0
NOP No operation
HLT Halt after interrupt is set
WAIT Wait for TEST pin active
Used to pass instruction to a coprocessor which
ESC opcode mem/ reg
shares the address and data bus with the 8086
LOCK Lock bus during next instruction

55
 6. Control Transfer
8086 Microprocessor Addressing Modes Instructions

6. Control Transfer Instructions

Transfer the control to a specific destination or target instruction
Do not affect flags

 8086 Unconditional transfers

Mnemonics Explanation

CALL reg/ mem/ disp16 Call subroutine

RET Return from subroutine

JMP reg/ mem/ disp8/ disp16 Unconditional jump

56
 6. Control Transfer
8086 Microprocessor Addressing Modes Instructions

6. Control Transfer Instructions

 8086 signed conditional branch  8086 unsigned conditional

instructions branch instructions

• Checks flags

• If conditions are true, the program control is transferred

to the new memory location in the same segment by
modifying the content of IP

57
 6. Control Transfer
8086 Microprocessor Addressing Modes Instructions

6. Control Transfer Instructions

 8086 signed conditional branch  8086 unsigned conditional branch
instructions instructions

Name Alternate name Name Alternate name

JE disp8 JZ disp8 JE disp8 JZ disp8
Jump if equal Jump if result is 0 Jump if equal Jump if result is 0
JNE disp8 JNZ disp8 JNE disp8 JNZ disp8
Jump if not equal Jump if not zero Jump if not equal Jump if not zero
JNLE disp8 JNBE disp8
JG disp8 JA disp8
Jump if not less or Jump if not below
Jump if greater Jump if above
equal or equal
JGE disp8 JAE disp8
JNL disp8 JNB disp8
Jump if greater Jump if above or
Jump if not less Jump if not below
than or equal equal
JNGE disp8 JNAE disp8
JL disp8 JB disp8
Jump if not greater Jump if not above
Jump if less than Jump if below
than or equal or equal
JLE disp8 JBE disp8
JNG disp8 JNA disp8
Jump if less than Jump if below or
Jump if not greater Jump if not above
or equal equal

58
 6. Control Transfer
8086 Microprocessor Addressing Modes Instructions

6. Control Transfer Instructions

 8086 conditional branch instructions affecting individual flags

Mnemonics Explanation

JC disp8 Jump if CF = 1

JNC disp8 Jump if CF = 0

JP disp8 Jump if PF = 1

JNP disp8 Jump if PF = 0

JO disp8 Jump if OF = 1

JNO disp8 Jump if OF = 0

JS disp8 Jump if SF = 1

JNS disp8 Jump if SF = 0

JZ disp8 Jump if result is zero, i.e, Z = 1

JNZ disp8 Jump if result is not zero, i.e, Z = 1

59
Assembler Directives
8086 Microprocessor Assembler Directives

Instructions to the Assembler regarding the program being

executed.
Control the generation of machine codes and organization of
the program; but no machine codes are generated for
assembler directives.
Also called ‘pseudo instructions’
Used to :
› specify the start and end of a program
› attach value to variables
› allocate storage locations to input/ output data
› define start and end of segments, procedures, macros etc..

61
8086 Microprocessor Assembler Directives
DB Define Byte
DW Define a byte type (8-bit) variable
SEGMENT Reserves specific amount of memory locations
ENDS to each variable
ASSUME
Range : 00H – FFH for unsigned value;
ORG
00H – 7FH for positive value and 80H – FFH
END
EVEN for negative value
EQU General form : variable DB value/ values
PROC Example:
FAR
LIST DB 7FH, 42H, 35H
NEAR
ENDP Three consecutive memory locations are reserved for the
SHORT variable LIST and each data specified in the instruction
are stored as initial value in the reserved memory
MACRO location
ENDM

62
8086 Microprocessor Assembler Directives
DB Define Word
DW Define a word type (16-bit) variable
SEGMENT Reserves two consecutive memory locations to
ENDS each variable
ASSUME
Range : 0000H – FFFFH for unsigned value;
ORG
0000H – 7FFFH for positive value and 8000H
END
EVEN – FFFFH for negative value
EQU General form : variable DW value/ values
PROC Example:
FAR
NEAR ALIST DW 6512H, 0F251H, 0CDE2H
ENDP Six consecutive memory locations are reserved for the
SHORT variable ALIST and each 16-bit data specified in the
instruction is stored in two consecutive memory
MACRO location.
ENDM

63
8086 Microprocessor Assembler Directives
DB SEGMENT : Used to indicate the beginning of a
code/ data/ stack segment
DW
SEGMENT ENDS : Used to indicate the end of a code/ data/
ENDS stack segment
ASSUME General form:
ORG
Segnam SEGMENT
END
EVEN …
EQU …
… Program code
PROC … or
FAR … Data Defining Statements
…
NEAR
ENDP Segnam ENDS

SHORT
MACRO
ENDM User defined name of the
segment

64
8086 Microprocessor Assembler Directives
DB Informs the assembler the name of the program/
data segment that should be used for a specific
DW segment.
SEGMENT
ENDS General form:
ASSUME ASSUME segreg : segnam, .. , segreg : segnam
ORG
END User defined name of the
EVEN Segment Register
segment
EQU
Example:
PROC
FAR ASSUME CS: ACODE, Tells the compiler that the
NEAR DS:ADATA instructions of the program
ENDP are stored in the segment
ACODE and data are stored
SHORT in the segment ADATA
MACRO
ENDM

65
8086 Microprocessor Assembler Directives
DB ORG (Origin) is used to assign the starting address
(Effective address) for a program/ data segment
DW
END is used to terminate a program; statements after
SEGMENT END will be ignored
ENDS
EVEN : Informs the assembler to store program/ data
ASSUME segment starting from an even address
ORG
EQU (Equate) is used to attach a value to a variable
END
EVEN Examples:
EQU ORG 1000H Informs the assembler that the statements
following ORG 1000H should be stored in
PROC memory starting with effective address 1000 H
FAR
LOOP EQU 10FEH Value of variable LOOP is 10FEH
NEAR
ENDP _SDATA SEGMENT In this data segment, effective address of
ORG 1200H memory location assigned to A will be 1200 H
SHORT A DB 4CH and that of B will be 1202H and 1203H.
EVEN
MACRO B DW 1052H
ENDM _SDATA ENDS

66
8086 Microprocessor Assembler Directives
DB PROC Indicates the beginning of a procedure

DW ENDP End of procedure

SEGMENT FAR Intersegment call

ENDS
NEAR Intrasegment call
ASSUME
General form
ORG
END procname PROC[NEAR/ FAR]
EVEN Program statements of the
EQU … procedure
…
PROC … Last statement of the procedure
FAR
RET
NEAR
ENDP procname ENDP

SHORT
MACRO User defined name of the
ENDM procedure

67
8086 Microprocessor Assembler Directives
DB Examples:
DW ADD64 PROC
NEAR
SEGMENT The subroutine/ procedure named
…
ENDS ADD64 is declared as NEAR and so the
…
assembler will code the CALL and RET
ASSUME …
instructions involved in this procedure
ORG as near call and return
RET
END ADD64 ENDP
EVEN CONVERT PROC
EQU FAR The subroutine/ procedure named
… CONVERT is declared as FAR and so
PROC
… the assembler will code the CALL and
FAR … RET instructions involved in this
NEAR procedure as far call and return
ENDP RET
CONVERT ENDP
SHORT
MACRO
ENDM

68
8086 Microprocessor Assembler Directives
DB Reserves one memory location for 8-bit signed
displacement in jump instructions
DW
SEGMENT Example:
ENDS
ASSUME
ORG The directive will reserve one
JMP SHORT
memory location for 8-bit
END AHEAD
displacement named AHEAD
EVEN
EQU
PROC
FAR
NEAR
ENDP
SHORT
MACRO
ENDM

69
8086 Microprocessor Assembler Directives
DB MACRO Indicate the beginning of a macro
DW ENDM End of a macro
SEGMENT General form:
ENDS
ASSUME macroname MACRO[Arg1, Arg2 ...]
Program
ORG … statements in the
END … macro
EVEN …
EQU
macroname ENDM
PROC
FAR
NEAR
ENDP
User defined name of the
SHORT macro

MACRO
ENDM

70
Thank You