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Depletion-type MOSFETs operate similarly to JFETs, but can have positive VGS values and drain currents exceeding IDSS. To analyze a depletion-type MOSFET circuit, the transfer and output characteristics are plotted and the Q-point found where they intersect. For enhancement-type MOSFETs, the transfer characteristic is quadratic rather than linear. Feedback biasing keeps VGS at VDD by controlling drain current. Voltage divider biasing sets VG, then the Q-point is found graphically. Common applications include voltage-controlled resistors, timers, and relay drivers.
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100% found this document useful (1 vote)
98 views24 pages

MOD1

Depletion-type MOSFETs operate similarly to JFETs, but can have positive VGS values and drain currents exceeding IDSS. To analyze a depletion-type MOSFET circuit, the transfer and output characteristics are plotted and the Q-point found where they intersect. For enhancement-type MOSFETs, the transfer characteristic is quadratic rather than linear. Feedback biasing keeps VGS at VDD by controlling drain current. Voltage divider biasing sets VG, then the Q-point is found graphically. Common applications include voltage-controlled resistors, timers, and relay drivers.
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Depletion-Type MOSFETs

Depletion-type MOSFET bias circuits are similar to JFETs. The only difference is
that the depletion-Type MOSFETs can operate with positive values of VGS and with
ID values that exceed IDSS.

1
Depletion-Type MOSFETs
The DC Analysis
 Same as the FET calculations
 Plotting the transfer characteristics of the device
 Plotting the at a point that V
GS exceeds the 0V or more positive values
 Plotting point when V =0V and I =0A
GS D
 The intersection between Shockley characteristics and linear
characteristics defined the Q-point of the MOSFET

 The problem is that how long does the transfer characteristics have to
be draw?
 We have to analyze the input loop parameter relationship.
 As R become smaller, the linear characteristics will be in narrow slope
S
therefore needs to consider the extend of transfer characteristics for
example of voltage divider MOSFET,

VG VGS V RS  0
VGS  VG  I D R S
 The bigger values of VP the more positive values we should draw for the
transfer characteristics
2
Analyzing the MOSFET circuit for DC
analysis

 How to analyze dc
analysis for the shown
network?
 It is a …. Type network
 Find VG or VGS
 Draw the linear
characteristics
 Draw the transfer
characteristics
 Obtain VGSQ and IDQ from
the graph intersection
3
1. Plot line for VGS = VG, ID = 0 and ID = VG/RS, VGS = 0
2. Plot the transfer curve by plotting IDSS, VP and calculated values of ID.
3. Where the line intersects the transfer curve is the Q-point.
Use the ID at the Q-point to solve for the other variables in the voltage-divider bias
circuit. These are the same calculations as used by a JFET circuit.

4
When RS change…the linear characteristics will change..
1. Plot line for VGS = VG, ID = 0 and ID = VG/RS, VGS = 0
2. Plot the transfer curve by plotting IDSS, VP and calculated values of ID.
3. Where the line intersects the transfer curve is the Q-point.
Use the ID at the Q-point to solve for the other variables in the voltage-divider bias
circuit. These are the same calculations as used by a JFET circuit.

5
Enhancement-Type MOSFET
The transfer characteristic for the enhancement-type MOSFET is very different
from that of a simple JFET or the depletion-typeMOSFET.

6
 Transfer characteristic for E-MOSFET

I D  k (VGS  VGS (Th ) ) 2

and
I D ( on )
k
(VGS ( on )  VGS (Th ) ) 2

7
Feedback Biasing Arrangement

IG =0A, therefore VRG = 0V


Therefore: VDS = VGS
Which makes V GS  V DD  I D R D
8
Feedback Biasing Q-Point
1. Plot the line using VGS = VDD, ID = 0 and ID = VDD / RD and VGS = 0
2. Plot the transfer curve using VGSTh , ID = 0 and VGS(on), ID(on); all given in the
specification sheet.
3. Where the line and the transfer curve intersect is the Q-Point.
4. Using the value of ID at the Q-point, solve for the other variables in the bias
circuit.

9
DC analysis step for Feedback Biasing
Enhancement type MOSFET
 Find k using the datasheet or specification given;
ex: VGS(ON),VGS(TH)
 Plot transfer characteristics using the formula
ID=k(VGS – VT)2. Three point already defined that is ID(ON),
VGS(ON) and VGS(TH)
 Plot a point that is slightly greater than VGS
 Plot the linear characteristics (network bias line)
 The intersection defines the Q-point

10
Example
 Determine IDQ and VDSQ for network below

11
Voltage-Divider Biasing

Again plot the line and the transfer curve to find the Q-point.
Using the following equations: R2VDD
VG 
R1  R2
Input loop : VGS  VG  I D RS
12
Output loop: V DS  V DD  I D ( RS  R D )
Voltage-Divider Bias Q-Point
1. Plot the line using VGS = VG = (R2VDD)/(R1 + R2), ID = 0 and ID = VG/RS
and VGS = 0

2. Find k

3. Plot the transfer curve using VGSTh, ID = 0 and VGS(on), ID(on); all given in
the specification sheet.

4. Where the line and the transfer curve intersect is the Q-Point.

5. Using the value of ID at the Q-point, solve for the other variables in the
bias circuit.

13
Example
 Determine IDQ and VGSQ and VDS for
network below

14
=-
= -

=-
= - ( + )

=
+
= -
= - ( + )

= -
= + - ( + )

=
15
=
=-
=
=
= -

=-
= -

=
+
= -
= - ( + )

=
= -

=
+
= -
16
Troubleshooting
 N-channel VGSQ will be 0V or negative if properly checked
 Level of VDS is ranging from 25%~75% of VDD. If 0V
indicated, there’s problem
 Check with the calculation between each terminal and
ground. There must be a reading, RG will be excluded

17
P-Channel FETs
For p-channel FETs the same calculations and graphs are used, except
that the voltage polarities and current directions are the opposite. The
graphs will be mirrors of the n-channel graphs.

18
Practical Applications

• Voltage-Controlled Resistor

• JFET Voltmeter

• Timer Network

• Fiber Optic Circuitry

• MOSFET Relay Driver

19
JFET Voltmeter

20
Advantages
 High Input impedance for isolation.
 Amount of power drawn from circuit under
test is very small, so no loading effect.
 Very high sensitivity.
 Amplifier gain allows measurement in the
mV range.
 No damage due to overload because of
amplifier saturation.
21
Single MOSFET Relay Toggle Circuit

22
For drawing an a c equivalent circuit of Amp.
• Assume all Capacitors C1, C2, Cs as short
circuit elements for ac signal
• Short circuit the d c supply
• Replace the FET by its small signal model
Analysis of CS Amplifier
A C Equivalent Circuit

Simplified A C Equivalent Circuit

v
Voltage gain, A  o
v v
gs
v  i R  g v R
o o L m gs L
Input imp., Z R R R
in G 1 2
v r R
A  o  g R , R  R r Out put imp., Z  r R  d D
v v m L L D d o d D r R
gs d D

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