Unit 4 - Io Systems
Unit 4 - Io Systems
Operating System Concepts – 9th Edition 13.2 Silberschatz, Galvin and Gagne
Overview
Operating System Concepts – 9th Edition 13.3 Silberschatz, Galvin and Gagne
I/O Hardware
Incredible variety of I/O devices
Storage
Transmission
Human-interface
Common concepts – signals from I/O devices interface with
computer
Port – connection point for device
Bus - daisy chain or shared direct access
PCI bus common in PCs and servers, PCI Express (PCIe)
expansion bus connects relatively slow devices
Controller (host adapter) – electronics that operate port, bus, device
Sometimes integrated
Sometimes separate circuit board (host adapter)
Contains processor, microcode, private memory, bus controller,
etc
– Some talk to per-device controller with bus controller,
microcode, memory, etc
Operating System Concepts – 9th Edition 13.4 Silberschatz, Galvin and Gagne
A Typical PC Bus Structure
Operating System Concepts – 9th Edition 13.5 Silberschatz, Galvin and Gagne
I/O Hardware (Cont.)
I/O instructions control devices
Devices usually have registers where device driver
places commands, addresses, and data to write, or
read data from registers after command execution
Data-in register, data-out register, status
register, control register
Typically 1-4 bytes, or FIFO buffer
Devices have addresses, used by
Direct I/O instructions
Memory-mapped I/O
Device data and command registers mapped
to processor address space
Especially for large address spaces (graphics)
Operating System Concepts – 9th Edition 13.6 Silberschatz, Galvin and Gagne
Device I/O Port Locations on PCs (partial)
Operating System Concepts – 9th Edition 13.7 Silberschatz, Galvin and Gagne
Polling
For each byte of I/O
1. Read busy bit from status register until 0
2. Host sets read or write bit and if write copies data
into data-out register
3. Host sets command-ready bit
4. Controller sets busy bit, executes transfer
5. Controller clears busy bit, error bit, command-ready
bit when transfer done
Step 1 is busy-wait cycle to wait for I/O from device
Reasonable if device is fast
But inefficient if device slow
CPU switches to other tasks?
But if miss a cycle data overwritten / lost
Operating System Concepts – 9th Edition 13.8 Silberschatz, Galvin and Gagne
Interrupts
Polling can happen in 3 instruction cycles
Read status, logical-and to extract status bit, branch if
not zero
How to be more efficient if non-zero infrequently?
CPU Interrupt-request line triggered by I/O device
Checked by processor after each instruction
Interrupt handler receives interrupts
Maskable to ignore or delay some interrupts
Interrupt vector to dispatch interrupt to correct handler
Context switch at start and end
Based on priority
Some nonmaskable
Interrupt chaining if more than one device at same
interrupt number
Operating System Concepts – 9th Edition 13.9 Silberschatz, Galvin and Gagne
Interrupt-Driven I/O Cycle
Operating System Concepts – 9th Edition 13.10 Silberschatz, Galvin and Gagne
Intel Pentium Processor Event-Vector Table
Operating System Concepts – 9th Edition 13.11 Silberschatz, Galvin and Gagne
Interrupts (Cont.)
Interrupt mechanism also used for exceptions
Terminate process, crash system due to
hardware error
Page fault executes when memory access error
System call executes via trap to trigger kernel to
execute request
Multi-CPU systems can process interrupts
concurrently
If operating system designed to handle it
Used for time-sensitive processing, frequent, must
be fast
Operating System Concepts – 9th Edition 13.12 Silberschatz, Galvin and Gagne
Direct Memory Access
Used to avoid programmed I/O (one byte at a time) for
large data movement
Requires DMA controller
Bypasses CPU to transfer data directly between I/O device
and memory
OS writes DMA command block into memory
Source and destination addresses
Read or write mode
Count of bytes
Writes location of command block to DMA controller
Bus mastering of DMA controller – grabs bus from CPU
Cycle stealing from CPU but still much more efficient
When done, interrupts to signal completion
Version that is aware of virtual addresses can be even
more efficient - DVMA
Operating System Concepts – 9th Edition 13.13 Silberschatz, Galvin and Gagne
Six Step Process to Perform DMA Transfer
Operating System Concepts – 9th Edition 13.14 Silberschatz, Galvin and Gagne
Application I/O Interface
I/O system calls encapsulate device behaviors in generic classes
Device-driver layer hides differences among I/O controllers from
kernel
New devices talking already-implemented protocols need no
extra work
Each OS has its own I/O subsystem structures and device driver
frameworks
Devices vary in many dimensions
Character-stream or block
Sequential or random-access
Synchronous or asynchronous (or both)
Sharable or dedicated
Speed of operation
read-write, read only, or write only
Operating System Concepts – 9th Edition 13.15 Silberschatz, Galvin and Gagne
A Kernel I/O Structure
Operating System Concepts – 9th Edition 13.16 Silberschatz, Galvin and Gagne
Characteristics of I/O Devices
Operating System Concepts – 9th Edition 13.17 Silberschatz, Galvin and Gagne
Characteristics of I/O Devices (Cont.)
Operating System Concepts – 9th Edition 13.18 Silberschatz, Galvin and Gagne
Block and Character Devices
Block devices include disk drives
The block-device interface captures all the aspects
necessary for accessing disk drives and other block-
oriented devices.
The device should understand the commands such as
read () & write (), and if it is a random access device, it
has a seek() command to specify which block to transfer
next.
Raw I/O, direct I/O, or file-system access
Memory-mapped file access can be layered on top of
block-device drivers. Rather than offering read and write
operations, a memory-mapped interface provides access
to disk storage via an array of bytes in main memory.
Character devices include keyboards, mice, serial ports
Commands include get(), put()
Libraries layered on top allow line editing
Operating System Concepts – 9th Edition 13.19 Silberschatz, Galvin and Gagne
Network Devices
Operating System Concepts – 9th Edition 13.20 Silberschatz, Galvin and Gagne
Clocks and Timers
Most computers have hardware clocks and timers
that provide three basic functions:
1. Give the current time
2. Give the elapsed time
3. Set a timer to trigger operation X at time
T
These functions are used by the operating
system & also by time sensitive applications.
Programmable interval timer: The hardware to
measure elapsed time and to trigger operations is
called a programmable interval timer. It can be
set to wait a certain amount of time and then to
generate an interrupt. To generate periodic
interrupts, it can be set to do this operation once
or to repeat.
Operating System Concepts – 9th Edition 13.21 Silberschatz, Galvin and Gagne
Nonblocking and Asynchronous I/O
Blocking - process suspended until I/O completed
Easy to use and understand
Insufficient for some needs
Nonblocking - I/O call returns as much as available
User interface, data copy (buffered I/O)
Implemented via multi-threading
Returns quickly with count of bytes read or
written
select() to find if data ready then read() or
write() to transfer
Asynchronous - process runs while I/O executes
Difficult to use
I/O subsystem signals process when I/O completed
Operating System Concepts – 9th Edition 13.22 Silberschatz, Galvin and Gagne
Two I/O Methods
Synchronou Asynchronous
s
Operating System Concepts – 9th Edition 13.23 Silberschatz, Galvin and Gagne
Vectored I/O
Vectored I/O allows one system call to perform
multiple I/O operations
For example, Unix readve() accepts a vector of
multiple buffers to read into or write from
This scatter-gather method better than multiple
individual I/O calls
Decreases context switching and system call
overhead
Some versions provide atomicity
Avoid for example worry about multiple
threads changing data as reads / writes
occurring
Operating System Concepts – 9th Edition 13.24 Silberschatz, Galvin and Gagne
Kernel I/O Subsystem
Kernels provide many services related to I/O.
i. One way that the I/O subsystem improves the
efficiency of the computer is by scheduling I/O operations.
ii. Another way is by using storage space in main
memory or on disk, via techniques called buffering, caching,
and spooling.
Operating System Concepts – 9th Edition 13.25 Silberschatz, Galvin and Gagne
Kernel I/O Subsystem
I/O Scheduling
Some I/O request ordering via per-device queue
a) It can improve overall system performance,
b) It can share device access fairly among
processes, and
c) It can reduce the average waiting time for I/0 to
complete.
Implementation: OS developers implement scheduling by
maintaining a ―queue of requests for each device.
1. When an application issues a blocking I/O system
call,
2. The request is placed on the queue for that device.
3. The I/O scheduler rearranges the order of the
queue to improve the overall system efficiency and the
average response time experienced by applications.
Operating System Concepts – 9th Edition 13.26 Silberschatz, Galvin and Gagne
Device-status Table
Operating System Concepts – 9th Edition 13.27 Silberschatz, Galvin and Gagne
Sun Enterprise 6000 Device-Transfer Rates
Operating System Concepts – 9th Edition 13.28 Silberschatz, Galvin and Gagne
Kernel I/O Subsystem
Buffering - store data in memory while transferring between
devices
To cope with device speed mismatch
To cope with device transfer size mismatch
To maintain “copy semantics”
Double buffering – two copies of the data
Kernel and user
Varying sizes
Full / being processed and not-full / being used
Copy-on-write can be used for efficiency in some cases
Operating System Concepts – 9th Edition 13.29 Silberschatz, Galvin and Gagne
Kernel I/O Subsystem
Caching - faster device holding copy of data
Always just a copy
Key to performance
Sometimes combined with buffering
Spooling - hold output for a device
If device can serve only one request at a time
i.e., Printing
Device reservation - provides exclusive access to a
device
System calls for allocation and de-allocation
Watch out for deadlock
Operating System Concepts – 9th Edition 13.30 Silberschatz, Galvin and Gagne
Error Handling
Operating System Concepts – 9th Edition 13.31 Silberschatz, Galvin and Gagne
STREAMS
STREAM – a full-duplex communication channel
between a user-level process and a device in Unix
System V and beyond
A STREAM consists of:
STREAM head interfaces with the user process
driver end interfaces with the device
zero or more STREAM modules between them
Each module contains a read queue and a write queue
Operating System Concepts – 9th Edition 13.32 Silberschatz, Galvin and Gagne
The STREAMS Structure
Operating System Concepts – 9th Edition 13.33 Silberschatz, Galvin and Gagne
Performance
Operating System Concepts – 9th Edition 13.34 Silberschatz, Galvin and Gagne
Intercomputer Communications
Operating System Concepts – 9th Edition 13.35 Silberschatz, Galvin and Gagne
Improving Performance
Reduce number of context switches
Reduce data copying
Reduce interrupts by using large transfers, smart
controllers, polling
Use DMA
Use smarter hardware devices
Balance CPU, memory, bus, and I/O performance for
highest throughput
Move user-mode processes / daemons to kernel
threads
Operating System Concepts – 9th Edition 13.36 Silberschatz, Galvin and Gagne
Device-Functionality Progression
Operating System Concepts – 9th Edition 13.37 Silberschatz, Galvin and Gagne