Coding and Error Control

Wireless Networks Spring 2005

Coping with Transmission Errors
 Error detection codes
o Detects the presence of an error
 Error correction codes, or forward correction
codes (FEC)
o Designed to detect and correct errors
o Widely used in wireless networks
 Automatic repeat request (ARQ) protocols
o Used in combination with error detection/correction
o Block of data with error is discarded
o Transmitter retransmits that block of data

Wireless Networks Spring 2005

Error Detection Probabilities
 Definitions
• Pb : Probability of single bit error (BER)
• P1 : Probability that a frame arrives with no bit errors
• P2 : While using error detection, the probability that a
frame arrives with one or more undetected errors
• P3 : While using error detection, the probability that a
frame arrives with one or more detected bit errors but
no undetected bit errors

Wireless Networks Spring 2005

Error Detection Probabilities
 With no error detection

P1 = (
1 − Pb )
F

P2 = 1 − P1
P3 = 0
• F = Number of bits per frame

Wireless Networks Spring 2005

Error Detection Process
 Transmitter
o For a given frame, an error-detecting code (check bits) is
calculated from data bits
o Check bits are appended to data bits
 Receiver
o Separates incoming frame into data bits and check bits
o Calculates check bits from received data bits
o Compares calculated check bits against received check
bits
o Detected error occurs if mismatch

Wireless Networks Spring 2005

Parity Check
 Parity bit appended to a block of data
 Even parity
o Added bit ensures an even number of 1s
 Odd parity
o Added bit ensures an odd number of 1s
 Example, 7-bit character [1110001]
o Even parity [11100010]
o Odd parity [11100011]

Wireless Networks Spring 2005

Cyclic Redundancy Check (CRC)
 Transmitter
o For a k-bit block, transmitter generates an (n-
k)-bit frame check sequence (FCS)
o Resulting frame of n bits is exactly divisible by
predetermined number
 Receiver
o Divides incoming frame by predetermined
number
o If no remainder, assumes no error

Wireless Networks Spring 2005

CRC using Modulo 2 Arithmetic
 Exclusive-OR (XOR) operation
 Parameters:
• T = n-bit frame to be transmitted
• D = k-bit block of data; the first k bits of T
• F = (n – k)-bit FCS; the last (n – k) bits of T
• P = pattern of n–k+1 bits; this is the predetermined
divisor
• Q = Quotient
• R = Remainder

Wireless Networks Spring 2005

CRC using Modulo 2 Arithmetic
 For T/P to have no remainder, start with
T =2 n −k
D+F
 Divide 2n-kD by P gives quotient and
remainder
2 n −k
D R
=Q+
P P
 Use remainder as FCS

T =2 n −k
D+R
Wireless Networks Spring 2005
CRC using Modulo 2 Arithmetic
 Does R cause T/P have no remainder?

T 2n −k D + R 2n −k D R
= = +
P P P P
 Substituting,
T R R R+R
=Q+ + =Q+ =Q
P P P P

o No remainder, so T is exactly divisible by P

Wireless Networks Spring 2005

CRC using Polynomials
 All values expressed as polynomials
o Dummy variable X with binary coefficients

X n −k D(X ) R(X )
= Q(X )+
P(X ) P(X )
T (X )= X n −k D(X )+ R(X )

Wireless Networks Spring 2005

CRC using Polynomials
 Widely used versions of P(X)
o CRC–12
• X12 + X11 + X3 + X2 + X + 1
o CRC–16
• X16 + X15 + X2 + 1
o CRC – CCITT
• X16 + X12 + X5 + 1
o CRC – 32
• X32 + X26 + X23 + X22 + X16 + X12 + X11 + X10 + X8 + X7 + X5 +
X4 + X2 + X + 1

Wireless Networks Spring 2005

CRC using Digital Logic
 Dividing circuit consisting of:
o XOR gates
• Up to n – k XOR gates
• Presence of a gate corresponds to the presence of a
term in the divisor polynomial P(X)
o A shift register
• String of 1-bit storage devices
• Register contains n – k bits, equal to the length of the
FCS

Wireless Networks Spring 2005

Digital Logic CRC

Wireless Networks Spring 2005

Wireless Transmission Errors
 Error detection requires retransmission
 Detection inadequate for wireless
applications
o Error rate on wireless link can be high, results
in a large number of retransmissions
o Long propagation delay compared to
transmission time

Wireless Networks Spring 2005

Block Error Correction Codes
 Transmitter
o Forward error correction (FEC) encoder maps
each k-bit block into an n-bit block codeword
o Codeword is transmitted; analog for wireless
transmission
 Receiver
o Incoming signal is demodulated
o Block passed through an FEC decoder

Wireless Networks Spring 2005

FEC Decoder Outcomes
 No errors present
o Codeword produced by decoder matches
original codeword
 Decoder detects and corrects bit errors
 Decoder detects but cannot correct bit
errors; reports uncorrectable error
 Decoder detects no bit errors, though
errors are present

Wireless Networks Spring 2005

Block Code Principles
 Hamming distance – for 2 n-bit binary sequences,
the number of different bits
o E.g., v1=011011; v2=110001; d(v1, v2)=3
 Redundancy – ratio of redundant bits to data bits
 Code rate – ratio of data bits to total bits
 Coding gain – the reduction in the required Eb/N0
to achieve a specified BER of an error-correcting
coded system

Wireless Networks Spring 2005

Block Codes
 The Hamming distance d of a Block code is
the minimum distance between two code
words
 Error Detection:
o Upto d-1 errors
 Error Correction:
o Upto ⎢d −1⎥
⎢
⎣ 2 ⎥
⎦

Wireless Networks Spring 2005

Coding Gain
 Definition:
o The coding gain is the amount of additional SNR or Eb/N0
that would be required to provide the same BER
performance for an uncoded signal

 If the code is capable of correcting at most t

errors and PUC is the BER of the channel without
coding, then the probability that a bit is in error
using coding is:

1 n ⎛n ⎞ i
PCB ≅ ∑i⎜⎜ ⎟⎟PUC (1−PUC )n −i
n i =t +1 ⎝ i ⎠

Wireless Networks Spring 2005

Hamming Code
 Designed to correct single bit errors
 Family of (n, k) block error-correcting codes with
parameters:
o Block length: n = 2m – 1
o Number of data bits: k = 2m – m – 1
o Number of check bits: n – k = m
o Minimum distance: dmin = 3
 Single-error-correcting (SEC) code
o SEC double-error-detecting (SEC-DED) code

Wireless Networks Spring 2005

Hamming Code Process
 Encoding: k data bits + (n -k) check bits
 Decoding: compares received (n -k) bits
with calculated (n -k) bits using XOR
o Resulting (n -k) bits called syndrome word
o Syndrome range is between 0 and 2(n-k)-1
o Each bit of syndrome indicates a match (0) or
conflict (1) in that bit position

Wireless Networks Spring 2005

Cyclic Block Codes
 Definition:
o An (n, k) linear code C is called a cyclic code if every cyclic shift
of a code vector in C is also a code vector
o Codewords can be represented as polynomials of degree n. For
a cyclic code all codewords are multiple of some polynomial
g(X) modulo Xn+1 such that g(X) divides Xn+1. g(X) is called
the generator polynomial.
 Examples:
o Hamming codes, Golay Codes, BCH codes, RS codes
o BCH codes were independently discovered by Hocquenghem
(1959) and by Bose and Chaudhuri (1960)
o Reed-Solomon codes (non-binary BCH codes) were
independently introduced by Reed-Solomon

Wireless Networks Spring 2005

Cyclic Codes
 Can be encoded and decoded using linear
feedback shift registers (LFSRs)
 For cyclic codes, a valid codeword (c0, c1, …, cn-1),
shifted right one bit, is also a valid codeword (cn-1,
c0, …, cn-2)
 Takes fixed-length input (k) and produces fixed-
length check code (n-k)
o In contrast, CRC error-detecting code accepts arbitrary
length input for fixed-length check code

Wireless Networks Spring 2005

 Cyclic Block Codes
 A cyclic Hamming code of length 2m-1 with m>2 is generated
by a primitive polynomial p(X) of degree m
 Hamming code (31, 26)
o g(X) = 1 + X2 + X5, l = 3

 Golay Code:
o cyclic code (23, 12)
o minimum distance 7
o generator polynomials: either g1(X) or g2(X)

g1 ( X ) = 1 + X 2 + X 4 + X 5 + X 6 + X 10 + X 11
g 2 ( X ) = 1 + X + X 5 + X 6 + X 7 + X 9 + X 11

Wireless Networks Spring 2005

BCH Codes
 For positive pair of integers m and t, a (n,
k) BCH code has parameters:
o Block length: n = 2m – 1
o Number of check bits: n – k <= mt
o Minimum distance:dmin >= 2t + 1
 Correct combinations of t or fewer errors
 Flexibility in choice of parameters
o Block length, code rate

Wireless Networks Spring 2005

Reed-Solomon Codes
 Subclass of nonbinary BCH codes
 Data processed in chunks of m bits, called
symbols
 An (n, k) RS code has parameters:
o Symbol length: m bits per symbol
o Block length: n = 2m – 1 symbols = m(2m – 1) bits
o Data length: k symbols
o Size of check code: n – k = 2t symbols = m(2t) bits
o Minimum distance: dmin = 2t + 1 symbols

Wireless Networks Spring 2005

Block Interleaving
 Data written to and read from memory in different
orders
 Data bits and corresponding check bits are
interspersed with bits from other blocks
 At receiver, data are deinterleaved to recover
original order
 A burst error that may occur is spread out over a
number of blocks, making error correction
possible

Wireless Networks Spring 2005

Block Interleaving
Convolutional Codes
 Generates redundant bits continuously
 Error checking and correcting carried out
continuously
o (n, k, K) code
• Input processes k bits at a time
• Output produces n bits for every k input bits
• K = constraint factor
• k and n generally very small
o n-bit output of (n, k, K) code depends on:
• Current block of k input bits
• Previous K-1 blocks of k input bits

Wireless Networks Spring 2005

Convolutional Encoder
Decoding
 Trellis diagram – expanded encoder diagram
 Viterbi code – error correction algorithm
o Compares received sequence with all possible
transmitted sequences
o Algorithm chooses path through trellis whose coded
sequence differs from received sequence in the fewest
number of places
o Once a valid path is selected as the correct path, the
decoder can recover the input data bits from the output
code bits

Wireless Networks Spring 2005

Automatic Repeat Request
 Mechanism used in data link control and
transport protocols
 Relies on use of an error detection code
(such as CRC)
 Flow Control
 Error Control

Wireless Networks Spring 2005

Flow Control
 Assures that transmitting entity does not
overwhelm a receiving entity with data
 Protocols with flow control mechanism allow
multiple PDUs in transit at the same time
 PDUs arrive in same order they’re sent
 Sliding-window flow control
o Transmitter maintains list (window) of sequence
numbers allowed to send
o Receiver maintains list allowed to receive

Wireless Networks Spring 2005

Flow Control
 Reasons for breaking up a block of data
before transmitting:
o Limited buffer size of receiver
o Retransmission of PDU due to error requires
smaller amounts of data to be retransmitted
o On shared medium, larger PDUs occupy
medium for extended period, causing delays at
other sending stations

Wireless Networks Spring 2005

Flow Control
Error Control
 Mechanisms to detect and correct
transmission errors
 Types of errors:
o Lost PDU : a PDU fails to arrive
o Damaged PDU : PDU arrives with errors
 Techniques:
o Timeouts
o Acknowledgments
o Negative acknowledgments

Wireless Networks Spring 2005