Microprocessor and Digital Logic
Microprocessor and Digital Logic
Logic
Chapter
Chapt. 1
ECEG122 Microprocessor and Digital Logic
Chapter 1
The base or radix of the number system(where base is determined as the total
number of digits available in the number system)
2 36 Remainder
Least Significant Bit (LSB)
2 18 0
2 9 0
2 4 1
2 2 0
2 1 0
0 1 Most Significant Bit (MSB)
Taking the reminder in Reverse order we have 100100. thus (36) 10 = (100100) 2.
.
ECEG122 Microprocessor and Digital Logic 13
Example
12510 = ?2 2 125
2 62 1
2 31 0
2 15 1
2 7 1
2 3 1
2 1 1
0 1
12510 = 11111012
1010112 => 1 x 20 = 1
1 x 21 = 2
0 x 22 = 0
1 x 23 = 8
0 x 24 = 0
1 x 25 = 32
4310
7248 => 4 x 80 = 4
2 x 81 = 16
7 x 82 = 448
46810
7 0 5
7058 = 1110001012
8 1234
8 154 2
8 19 2
8 2 3
0 2
123410 = 23228
16 1234
16 77 2
16 4 13 = D
0 4
123410 = 4D216
1 0 A F
10AF16 = 00010000101011112
Apart from 8421, some other weighted BCD codes are 4221, 2421
and 5211
8 4 2 1 8 4 2 1 8 4 2 1
1 0 0 1 0 0 1 1 1 0 0 0
8+0+0+1 0+0+2+1 8+0+0+0
9 3 8
• Answer 11101
• Ans 1001010
• Parity bit can detect odd number of errors but not even number of errors.
Example: For odd parity numbers,
10011 10001 (detected)
10011 10101 (non detected)
D7 D6 D5 P4 D3 P2 P1
1 0 1 1 0 1 1
• The Lets Check the parity P1= D3D5D7 1=011 it is Wrong. It is not even
parity it is odd parity so P1=1
• P2=D3D6D7 1=001 it is correct even parity so P=0
• P4= D5D6D71=101 It is Wrong. It is not even parity it is Odd parity so P4=1
• Lets concatenate( collectively ) P1P2P4 101 = 5
• So the fifth bit having error (D5) so it should correct by change the value D5 form 1 to
0
• So the correct data and parity stream will be 1001011