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Single Drivers Vs Distributed Buffers-Aman

This document discusses single driver vs distributed buffer schemes for clock distribution networks. It describes how buffers are used to drive large capacitive loads on clocks and reduce clock skews. Distributed buffer schemes insert intermediate buffers in parts of the clock tree to further reduce skew variations caused by differences in wire lengths and loads. Formulas are provided to calculate skew between clock sinks based on wire resistances, lengths, widths, and loads. The document also discusses methods for determining optimal buffer insertion points and levels in the clock tree to ensure symmetrical timing and meet skew tolerances.

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Akshaja Kanugovi
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789 views11 pages

Single Drivers Vs Distributed Buffers-Aman

This document discusses single driver vs distributed buffer schemes for clock distribution networks. It describes how buffers are used to drive large capacitive loads on clocks and reduce clock skews. Distributed buffer schemes insert intermediate buffers in parts of the clock tree to further reduce skew variations caused by differences in wire lengths and loads. Formulas are provided to calculate skew between clock sinks based on wire resistances, lengths, widths, and loads. The document also discusses methods for determining optimal buffer insertion points and levels in the clock tree to ensure symmetrical timing and meet skew tolerances.

Uploaded by

Akshaja Kanugovi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Single Drivers vs Distributed

Buffers
Need for Buffers
• What are clock skews? Variations of delays from clk source to sink.

• To ensure fast clocking transitions, buffers are used to drive large load
capacitance on a clock.
Types of Driver Schemes
• Single Driver – A chain of cascaded buffers with very large buffers at
clock source and no other buffers elsewhere.
Types of Driver Schemes
• Distributed Buffer Schemes – intermediate buffers are inserted in
various parts of the clock tree.
Effects of wire widening and intermediate
Buffer Insertion
Clock Tree
• Clock distribution network within a system or a hardware design. It
includes clocking circuitry.
Skew variation calculation
• From previous figure skew between sink 1 and 2 can be calculated as

𝑟𝑙1 𝐶𝐿1 𝑟𝑙2 𝐶𝐿2


𝑡𝑠 = −
𝑤1 𝑤2

Where r is the sheet resistance and l1 and l2 are the lengths and w1 and
w2 are the widths and CL is the load impedances at the sink.
Buffer Insertion in Clock Tree
• For simplicity, we budget the given tolerable skew ts into 2
components
• Tolerable skew for buffer delays 𝑡𝑏𝑠 .
𝑠
• Tolerable skew for asymmetric loads and wire width deviations 𝑡𝑤 .
Buffer Insertion Points (BIPs)
• Formulation 1 – given equal path length clock tree with min. width for
𝑠
all branches and the tolerable skew constraint, 𝑡𝑤 the problem of
buffer insertion is to determine the minimum number of BIPs such
that 𝑡𝑤𝑠
< 𝑡𝑏𝑠 .
• The resulting tree must have the following properties
• Each source to sink path has same number of buffers
• All sub trees rooted at given level are equal path length trees.
Iso – Radius Levels
• An iso-radius level of clock tree is a circle centered at the clock source
such that all the paths from source to the BIPs are of same length. For
a tree with length L, we choose radius θ of first level where
𝐿
𝜃=
𝜙+1
Where φ is the designated number of levels of Buffers.
Level Insertion Method
• Buffer is added at branch split.

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