Assembly Language: Alice Andrea Briceño Murcia

Assembly Language
Alice Andrea Briceño Murcia

Electrónica Digital 1
Sección 6.2
1
ARCHITECTURE
Computer’s Architecture
INSTRUCTIONS INSTRUCTION SET

The words in a computer’s language are The computer’s vocabulary is called the
called instructions. instruction set.
Computer instructions indicate both the All programs running on a computer use
operation to perform and the operands to the same instruction set.
use.
Computer hardware understands only 1’s and
0’s, so instructions are encoded as binary
numbers in a format called machine
language.
However, humans consider reading machine language to be tedious, so we prefer

to represent the instructions in a symbolic format called assembly language.
3
“
We motivate the design of the MIPS
architecture using four principles:
(1) Simplicity favors regularity;
(2) Make the common case fast;
(3) Smaller is faster;
(4) Good design demands good compromises.
4
ASSEMBLY
LANGUAGE
5
1.
INSTRUCTIONS
6
Design Principle 1: Simplicity favors
regularity.
 add is called mnemonic,

indicates what operation
to perform.
 b, c are the source
operands, where the
operation is performed.
 a, the destination
operand, where the
result is written.
7
Design Principle 2: Make the common case
fast.
 t variable temporary to
store intermediate
result.
Using multiple assembly
language instruction to
perform more complex
operations is an example of
the second design principle
of computer architecture.
Thus, MIPS is a reduced
instruction set computer
architecture
8
2.
OPERANDS
Registers, Memory and Costants
9
Registers, Memory and Costants
An instruction operates on Operands can be stored in

operands. In Code Example registers or memory, or they may
6.1 the variables a, b, be constants stored in the
and c are all operands. instruction itself. Operands
But computers operate on stored as constants or in
1’s and 0’s, not variable registers are accessed quickly,
names. The instructions but they hold only a small
need a physical location amount of data. Additional data
from which to retrieve the must be accessed from memory,
binary data. which is large but slow.
10
Design Principle 3: Smaller is faster.
“
Instructions need to access operands quickly so
that they can run fast. But operands stored in
memory take a long time to retrieve. Therefore,
most architectures specify a small number of
registers that hold commonly used
operands. The MIPS architecture uses 32 registers,
called the register set or register file. The fewer
the registers, the faster they can be accessed.
11
The Register Set
12
add instruction with register operands
 MIPS register names are

preceded by the $ sign.
 The instruction adds the 32-
bit values contained in $s1
(b) and $s2 (c) and writes
the 32-bit result to $s0 (a).
 Register names beginning with
$s are called saved
registers.
 Registers names beginning
with $t are called temporary
registers.
13
TRANSLATING HIGH-LEVEL CODE TO ASSEMBLY
LANGUAGE
Translate the following high-level code into assembly language. Assume

variables a–c are held in registers $s0–$s2 and f–j are in $s3–$s7.
14
MEMORY
Memory
By using a combination of memory and

registers, a program can access a
large amount of data fairly quickly.
MIPS uses a byte-addressable memory.
That is, each byte in memory has a
unique address.
Figure 6.1 shows a memory array that is word-addressable.

That is, each 32-bit data word has a unique 32-bit address.
16
READING WORD-ADDRESSABLE MEMORY
MIPS uses the load word instruction, After the load word instruction (lw)
lw, to read a data word from memory is executed, $s3 holds the value
into a register. Code Example loads 0xF2F1AC07, which is the data value
memory word 1 into $s3. the base stored at memory address 1.
address is $0, which holds the value
0, and the offset is 1, so the lw
instruction reads from memory
address ($0 + 1) = 1.
17
WRITING WORD-ADDRESSABLE MEMORY
Similarly, MIPS uses the store word These examples have used $0 as the
instruction, sw, to write a data base address for simplicity, but
word from a register into memory. remember that any register can be
Code Example writes the contents of used to supply the base address.
register $s7 into memory word 5.
18
BYTE-ADDRESSABLE MEMORY
The MIPS memory model,

however, is byte-addressable.
Each data byte has a unique
address. A 32-bit word
consists of four 8-bit bytes.
So each word address is a
multiple of 4.
19
ACCESSING BYTE-ADDRESSABLE MEMORY
MIPS Assembly Code
The MIPS architecture

also provides the lb
and sb instructions
that
load and store single
bytes in memory
rather than words.
Code Example 6.8 shows how to read and write words in the
MIPS byte-addressable memory. The word address is four times
the word number. The MIPS assembly code reads words 0, 2,
and 3 and writes words 1, 8, and 100.
20
Big- and little-endian
memory addressing
In big-endian machines,
bytes are numbered starting
with 0 at the big (most
significant) end. In
little-endian machines,
bytes are numbered starting
with 0 at the little (least
significant) end.
Byte-addressable memories are organized in

a big-endian or little-endian fashion
21
CONSTANTS/ IMMEDIATES
Load word and store word, lw and sw, also illustrate the use of constants in MIPS
instructions. These constants are called immediates, because their values are
immediately available from the instruction and do not require a register or memory
access.
Add immediate, addi, is another common MIPS instruction that uses an

immediate operand. addi adds the immediate specified in the
instruction to a value in a register, as shown in Code Example
22
Design Principle 4: Good design demands
good compromises.
A single instruction format would be simple but not flexible. The MIPS instruction set
makes the compromise of supporting three instruction formats.
One format, A third, to be

used for discussed
instructions Another, used for later, has a
such as add and instructions such 26-bit
sub, has three as lw and addi, immediate and
register has two register no registers.
operands. operands and a 16-
bit immediate.
23
FIN

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Assembly Language

Alice Andrea Briceño Murcia

INSTRUCTIONS INSTRUCTION SET

However, humans consider reading machine language to be tedious, so we prefer

 add is called mnemonic,

An instruction operates on Operands can be stored in

 MIPS register names are

Translate the following high-level code into assembly language. Assume

By using a combination of memory and

Figure 6.1 shows a memory array that is word-addressable.

The MIPS memory model,

MIPS Assembly Code

The MIPS architecture

Byte-addressable memories are organized in

Add immediate, addi, is another common MIPS instruction that uses an

One format, A third, to be

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