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2.DATA Movement - Lecture 2018

The document describes instructions for data movement in a microcontroller. It includes: - Load File Select Register (lfsr) instruction to select a register file - Move (movf, movff, movwf) instructions to move data between registers and memory locations - Move Literal (movlw, movlb) instructions to move a literal value to a register - Swap (swapf) instruction to swap nibbles in a register It provides examples of using movf and movwf instructions to move data between memory addresses and the WREG register. Additional instructions like movlb are used to select the active bank for 8-bit address locations.

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48 views30 pages

2.DATA Movement - Lecture 2018

The document describes instructions for data movement in a microcontroller. It includes: - Load File Select Register (lfsr) instruction to select a register file - Move (movf, movff, movwf) instructions to move data between registers and memory locations - Move Literal (movlw, movlb) instructions to move a literal value to a register - Swap (swapf) instruction to swap nibbles in a register It provides examples of using movf and movwf instructions to move data between memory addresses and the WREG register. Additional instructions like movlb are used to select the active bank for 8-bit address locations.

Uploaded by

Vinod
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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DATA Movement

• DATA movement instructions

Status
Mnemonic Description 16-bit instruction word
affect

lfsr f,k load FSR 1110 1110 00ff k11kkk none

1111 0000 k7kkk kkkk

movf f,d,a move f 0101 00da ffff ffff Z,N

movff fs,fd move fsource to fdestination 1100 ffff ffff ffff none

1111 ffff ffff ffff

movwf f,a move WREG to f 0110 111a ffff ffff none

movlb k move literal to BSR<3:0> 0000 0001 kkkk kkkk none

movlw k move literal to WREG 0000 1110 kkkk kkkk none

swapf f,d,a swapp nibble in f 0011 10da ffff ffff none

• Note: lfsr and movff use 32-bit instruction

2
Data move from any address to WREG

[addr]  WREG
MOVF f,d,a 0101 00da ffff ffff
f – file register ( 8 bit address)
F : same address
d – destination d a
W : WREG W =0 A = 0
A access bank ( 0x00 – 0x5F)
a F= 1 BANKED = 1
BANKED
Data move from any address to WREG
[addr1]  WREG

MOVF addr1,W,A addr1 AA


AA WREG
addr2 26 00

Machine code : 0 1 0 1 0 0 d a f f f f f f f f
Initial values for registers
Bank 0 Bank 1 WREG 2F
0x00 2A 0x100 3E
BSR 1
0x01 71 0x101 66
0x02 DC 0x102 40 STATUS N=0 OV=0 Z=0 DC=0 C=1
0x03 99 0x103 C1

Bank 2 Bank 3
0x200 00 0x300 8A
0x201 9F 0x301 55
0x202 0B 0x302 10
0x203 13 0x303 02
Eg. MOVF 0x02,W,A

0101
0x00 2A
00da
Bank 0
0x00 3E
ffff ffff
0x100
Bank 1

0101
0x01
0x02
71
DC
00
0x01
0x02
66
40
0x101

0x102

0x03 99 0x03
0x103 C1

Bank 2 Bank 4
0x200 00 0x300 8A
0x201 9F 0x301 55 Machine code
0x202 0B 0x302 10
0x203 13 0x303 02
Eg. MOVF 0x02,W,A ; [0x 02]  WREG

Bank 0 Bank 1 WREG 2F


0x00 2A 0x100 3E
BSR 1
0x01 71 0x101 66
0x02 DC
DC
0x102 40 STATUS N=0
N=1 OV=0 Z=0 DC=0 C=1
0x03
0x103 C1
99

Bank 2 Bank 3
0x200 00 0x300 8A
0x201 9F 0x301 55
0x202 0B 0x302 10
0x203 13 0x303 02
Eg. MOVF 0x02,W,BANKED

0101
0x00 2A
0 0 d3Ea f f f f f f f f
Bank 0
0x00 0x100
Bank 1

0101
0x01
0x02
71
DC
00
0x01
0x02
66
40
0x101

0x102

0x03 99 0x03
0x103 C1

Bank 2 Bank 4
0x200 00 0x300 8A
0x201 9F 0x301 55 Machine code
0x202 0B 0x302 10
0x203 13 0x303 02
Eg. MOVF 0x02,W,BANKED ; [0x 02]  WREG

Bank 0 Bank 1 WREG 2F


0x00 2A 0x100 3E
BSR 1
0x01 71 0x101 66
0x02 DC 0x102 40 STATUS N=0 OV=0 Z=0 DC=0 C=1
0x03 99 0x103 C1

Bank 2 Bank 4
0x200 00 0x300 8A
0x201 9F 0x301 55
0x202 0B 0x302 10
0x203 13 0x303 02
Data move from WREG to any address

WREG  [addr]
MOVWF f,a 0110 111a ffff ffff

f – file register ( 8 bit address) a


A =0

A access bank ( 0x00 – 0x5F)


a BANKED = 1
BANKED
Data move from WREG to any address
WREG  [addr1]

MOVWF f,a addr1 AA WREG


addr2 26 00
00

Machine code : 0 1 1 0 1 1 1 a f f f f f f f f
Eg. MOVWF 0x00,A

0110
0x00 2A
111a3E f f f f f f f f
Bank 0
0x00 0x100
Bank 1

0110
0x01
0x02
71
DC
111
0x01
0x02
66
40
0x101

0x102

0x03 99 0x03
0x103 C1

Bank 2 Bank 4
0x200 00 0x300 8A
0x201 9F 0x301 55 Machine code
0x202 0B 0x302 10
0x203 13 0x303 02
Eg. MOVWF 0x00,A ; WREG [0x 00]

Bank 0 Bank 1 WREG 2F


0x00 2A 0x100 3E
BSR 1
0x01 71 0x101 66
0x02 DC 0x102 40 STATUS N=0 OV=0 Z=0 DC=0 C=1
0x03 99 0x103 C1

Bank 2 Bank 3
0x200 00 0x300 8A
0x201 9F 0x301 55
0x202 0B 0x302 10
0x203 13 0x303 02
Eg. MOVWF 0x00,BANKED ;

0110
0x00 2A
111a
Bank 0
0x00 3E
ffff ffff
0x100
Bank 1

0110
0x01
0x02
71
DC
111
0x01
0x02
66
40
0x101

0x102

0x03 99 0x03
0x103 C1

Bank 2 Bank 4
0x200 00 0x300 8A
0x201 9F 0x301 55 Machine code
0x202 0B 0x302 10
0x203 13 0x303 02
Eg. MOVWF 0x00,BANKED ; WREG [0x 00]

Bank 0 Bank 1 WREG 2F


0x00 2A 0x100 3E
BSR 1
0x01 71 0x101 66
0x02 DC 0x102 40 STATUS N=0 OV=0 Z=0 DC=0 C=1
0x03 99 0x103 C1

Bank 2 Bank 3
0x200 00 0x300 8A
0x201 9F 0x301 55
0x202 0B 0x302 10
0x203 13 0x303 02
How to activate the Bank?
MOVLB k; BSR = k
k 4bit binary
0000 0001 0000 kkkk

MOVLB 4; BSR = 4 bank 4 is active.

0000 0001 0000


MOVLB 0x3 ;BSR= 3
MOVF 0X2, W,BANKED ;[0x302]WREG
Bank 0 Bank 1 WREG 2F
0x00 2A 0x100 3E
BSR 1
3
0x01 71 0x101 66
0x02 DC 0x102 40 STATUS N=0 OV=0 Z=0 DC=0 C=1
0x03 99 0x103 C1

Bank 2 Bank 3
0x200 00 0x300 8A
0x201 9F 0x301 55
0x202 0B 0x302
10
10
0x203 13 0x303
02
Data move from 1 address to another address

[addr1]  [addr2] addr1 AA


AA
addr2 26
MOVFF fs,fd

Machine code :1100 f f f f f f f f f f f f fs


1111 f f f f f f f f f f f f fd
Eg. MOVFF 0x03,0x201

1100 ffff 3Effff ffff


Bank 0 Bank 1
0x00 2A 0x00 0x100 fs
1100
0x01
0x02
71
DC
0x01
0x02
66
0x101

40
0x102

1111
0x03 99
ffff C1ffff ffff
0x03 0x103
fd
1111
0x200
Bank 2
00
Bank 4
8A
0x300

0x201 9F 0x301 55 Machine code


0x202 0B 0x302 10
0x203 13 0x303 02
Eg. MOVFF 0x03,0x201 ;[0x3] [0x201]

Bank 0 Bank 1 WREG 2F


0x00 2A 0x100 3E
BSR 1
0x01 71 0x101 66
0x02 DC 0x102 40 STATUS N=0 OV=0 Z=0 DC=0 C=1
0x03 99
99 0x103 C1

Bank 2 Bank 3
0x200 00 0x300 8A
0x201 9F 0x301 55
0x202 0B 0x302 10
0x203 13 0x303 02
Example
Write a program to transfer the content of data registers located
at 0x20 to 0x30, 0x21 to 0x31, 0x22 to 0x32, 0x23 to 0x33 and
0x24 to 0x34

0x20 A9 0x30 00
0x21 11
11 0x31 08
0x22 22 0x32 09
0x23 33 0x33 05
0x24 44 0x34 04
SOLUTION 1 – using MOVFF fs,fd
MOVFF 0X20,0X30
MOVFF 0X21,0X31 0x20 A9 0x30 00

MOVFF 0X22,0X32 0x21 11


11 0x31 08
0x22 22 0x32 09
MOVFF 0X23,0X33 0x23 33 0x33 05
MOVFF 0X24,0X34 0x24 44 0x34 04
SOLUTION 2 – using WREG
MOVF 0X20,W,A
MOVWF 0X30,A 0x20 A9 0x30 00
MOVF 0X21,W,A 0x21 11
11 0x31 08
MOVWF 0X31,A 0x22 22 0x32 09
MOVF 0X22,W,A 0x23 33 0x33 05
0x24 44 0x34 04
MOVWF 0X32,A
MOVF 0X23,W,A
MOVWF 0X33,A WREG = A9
00
44
11
33
22
MOVF 0X24,W,A
MOVWF 0X34,A
Load/ write new value(8 bit) into WREG

WREG  k 8 bit

MOVLW k ; WREG = k

Machine code : 0000 1110 kkkk kkkk


Eg. MOVLW 0X3D

0000 1110 kkkk kkkk


Bank 0 Bank 1
0x00 2A 0x00 3E 0x100

0000
0x01
0x02
71
DC
1110
0x01
0x02
66
40
0x101

0x102

0x03 99 0x03
0x103 C1

Bank 2 Bank 4
0x200 00 0x300 8A
0x201 9F 0x301 55 Machine code
0x202 0B 0x302 10
0x203 13 0x303 02
Eg. MOVLW 0X3D
3D

WREG 2F

BSR 1

STATUS N=0 OV=0 Z=0 DC=0 C=1


Write an instruction sequence to write value
0x91 into data memory address 0x17
• 0x91  WREG
• WREG  [0x17] WREG 0X15 11

AB
91 0X16 22
MOVLW 0X91 0X17 33

MOVWF 0X17,A 0X18 44

91
SWAPF f,d,a ;swap high nibble with low nibble

EXAMPLE: 0X1A 37
WREG
SWAPF 0X1D,F,A AB 0X1B 20
0X1C 3A
0X1D 62
26
6 2

6 2
SWAPF f,d,a ;swap high nibble with low nibble

EXAMPLE: 0X1A 37
WREG
SWAPF 0X1D,W,A AB
26 0X1B 20
0X1C 3A
0X1D 62
6 2

6 2
LFSR FSRn,k ; FSRn = k(12 bit)

EXAMPLE:
LFSR FSR1, 0 X 2 3 4 1110 1110 00ff k11kkk

1111 0000 k7kkk kkkk0


FSRn
n = 0,1,2 only
1110 1110 0001 0010
1111 0000 0011 0100

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