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Pin Functions

The document describes the pin diagram and functions of the 8086 and 8088 microprocessors. It details 10 pins that are used in minimum mode: the AD bus serves as the address and data bus; A19-A16/S6-S3 output the upper address bits and status; BHE/S7 indicates byte transfers; NMI and INTR are interrupt requests; CLK is the clock signal; RESET clears registers; READY inserts wait states; TEST is used by the WAIT instruction; and RD indicates reads. The MN/MX pin selects between minimum and maximum mode.

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Marvin Mayormente
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252 views

Pin Functions

The document describes the pin diagram and functions of the 8086 and 8088 microprocessors. It details 10 pins that are used in minimum mode: the AD bus serves as the address and data bus; A19-A16/S6-S3 output the upper address bits and status; BHE/S7 indicates byte transfers; NMI and INTR are interrupt requests; CLK is the clock signal; RESET clears registers; READY inserts wait states; TEST is used by the WAIT instruction; and RD indicates reads. The MN/MX pin selects between minimum and maximum mode.

Uploaded by

Marvin Mayormente
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Pin Diagram of 8086 and 8088 Microprocessor:

• In order to implement many situations in the


microcomputer system the Pin Diagram of
8086 and 8088 Microprocessor has been
designed to work in two operating modes :
8086 Minimum Mode Pins:
• 1.AD15-AD0 : Acts as address bus during the first part
of machine cycle and data bus for the remaining part
of the machine cycle.
• 2.A19/S6-A16/S3 : During the first part of machine cycle
these are used to output upper 4-bits of address.
During remaining part of the machine cycle these are
used to output status, which indicates the type of
operation to be performed in that cycle. S3 and
S4 indicate the segment register being used as
follows :
8086 Minimum Mode Pins:

S5 gives the current setting of the interrupt flag (IF) and S6 is always
zero.
8086 Minimum Mode Pins:
• 3.BHE/S7 : BHE (Bus High Enable) : Low on this
pin during first part of the machine cycle,
indicates that at least one byte of the current
transfer is to be made on higher order byte
AD15-AD8; otherwise the transfer is made on
lower order byte AD7-AD0.
8086 Minimum Mode Pins:

Status S7 is output during the later part of the machine cycle, but, presently,
57 has not been assigned a meaning.
8086 Minimum Mode Pins:
• 4.NMI : It is a positive edge triggered nortmaskable
interrupt request,
• 5.INTR : It is a level triggered maskable interrupt
request. It is sampled during the last clock cycle of
each instruction to determine if the processor should
enter into an interrupt service routine.
• 6.CLK : 8086 requires clock signal (with 33 % duty
cycle) from some external, crystal controlled
generator to synchronize internal operations. Clock
frequency depends
8086 Minimum Mode Pins:
• 7.RESET : It clears PSW, IP, DS, SS, ES, and the
instruction queue. It then sets CS to FITIMI. This
signal must be high for at least 4 clock cycles.
When RESET is removed, 8086 will fetch its next
instruction from physical address FEFFOH.
• 8.READY : If this signal is low the 8086 enters
into wait state. This signal is used primarily to
synchronize slower peripherals with the
microprocessor.
8086 Minimum Mode Pins:
• 9.TEST (Input) : This signal is only used by the WAIT
instruction. The 8086 enters into
a wait state after execution of the WAIT instruction until a
LOW signal on the TEST pin. TEST signal is synchronized
internally during each clock cycle on the leading edge of
the clock cycle.
• 10.RD (Output) : RD is low whenever the 8086 is reading
data from memory or an I/O device.
• 11. MN/MX (Input) : The 8086 can be configured in either
minimum mode or maximum mode using this pin. This pin
is tied high for minimum mode.

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