Scribd
Upload
137 views

Decoder Tocci

This document discusses decoders and demultiplexers. It defines decoders as circuits that select one of 2N output lines by decoding a binary value on N input lines. It provides examples of 2-to-4 and 3-to-8 decoders and discusses how decoders can be cascaded. It also shows how a 3-to-8 decoder can be used to design a full adder logic circuit. It then defines demultiplexers as circuits that route a single input line to one of multiple output lines based on the state of select inputs. It provides an example of a 1-line to 4-line demultiplexer and a 1-line to 8-line demultiplexer, discussing how the 74LS138 chip

Uploaded by

mohit
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
137 views

Decoder Tocci

This document discusses decoders and demultiplexers. It defines decoders as circuits that select one of 2N output lines by decoding a binary value on N input lines. It provides examples of 2-to-4 and 3-to-8 decoders and discusses how decoders can be cascaded. It also shows how a 3-to-8 decoder can be used to design a full adder logic circuit. It then defines demultiplexers as circuits that route a single input line to one of multiple output lines based on the state of select inputs. It provides an example of a 1-line to 4-line demultiplexer and a 1-line to 8-line demultiplexer, discussing how the 74LS138 chip

Uploaded by

mohit
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 25

Decoders

(Ref. Tocci)
Definitions
 Active – the function is being performed
 Active low – active when the output is 0.
 Active high – active when the output is 1.

 Enabled – active circuit can perform its function


 Low-level enabled
 circuit performs its function when Enable = 0.
 High-level enabled
 circuit performs its function when Enable = 1.

2
Decoders

3
Decoder

A decoder selects 1 of 2N output lines by


decoding a binary value on the N input lines.

4
Decoder: N-to-2N

w0 y0
N
inputs 2N
wn – 1 outputs
y2n – 1
Enable En

Active-high or active-low
Active-high or active-low

5
Decoder: 2-to-4

x
D0
x y D D D D
0 1 2 3 y
0 0 1 0 0 0
D1
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1 D2

D3

active-high output

6
Decoder: 2-to-4 with Enable

active-low output

7
Decoder: 3-to-8

8
Decoder: 3-to-8

9
Decoder: 4-to-16

10
CASCADING OF DECODERS
Decoders

Designing Logic Circuits


using Decoders

16
Decoders: Designing Logic Circuits

Exercise:

Design a Full Adder using a 3-to-8 Decoder.

17
Full Adder:

Sum = X xor Y xor Z

Carry = X.Y + X.Z + Y.Z

18
Decoders: Designing Logic Circuits
Full Adder

19
Demultiplexer
A 1-line-to-4-line demultiplexer.

21
The serial data input waveform (Data in) and data select inputs (So and S1)
and
the corresponding data output waveforms (D0 through D3) are shown
below

22
A 1-line to 8-line demultiplexer
A 1-line to 8-line demultiplexer
The 74LS138 can be used as a demultiplexer
with E1 as the data input line

You might also like