William Stallings

Computer Organization
and Architecture
8th Edition

Chapter 2
Computer Evolution and
Performance
ENIAC - background
• Electronic Numerical Integrator And
Computer
• professor john Mauchly and John Eckert
(his graduate student) and University of
Pennsylvania
• Trajectory tables for weapons
• Started 1943
• Finished 1946
—Too late for war effort
• Used until 1955 disassembled by BRL
Management
ENIAC - details
• Decimal (not binary)
• 20 accumulators of 10 digits
• Programmed manually by switches
• 18,000 vacuum tubes
• 30 tons
• 15,000 square feet
• 140 kW power consumption
• 5,000 additions per second
ENIAC - details
• Its memory consisted of 20
“accumulators,” each capable of holding a
10-digit decimal number.
• A ring of 10 vacuum tubes represented
each digit. At any time, only one vacuum
tube was in the ON state, representing
one of the 10 digits.
• The major drawback of the ENIAC was
that it had to be programmed manually
by setting switches and plugging and
unplugging cables.
Stored-program concept
• The task of entering and altering
programs for the ENIAC was extremely
tedious.
• The programming process could be
facilitated if the program could be
represented in a form suitable for storing
in memory alongside the data.
• Then, a computer could get its
instructions by reading them from
memory, and a program could be set or
altered by setting the values of a portion
of memory.
von Neumann/Turing
• Stored Program concept
• Main memory storing programs and data
• ALU operating on binary data
• Control unit interpreting instructions from
memory and executing
• Input and output equipment operated by
control unit
• Princeton Institute for Advanced Studies
• IAS Computer although not completed
until 1952, is the prototype of all
subsequent general-purpose computers.
Structure of von Neumann machine
Structure of von Neumann machine

• A main memory, which stores both data and instructions

• An arithmetic and logic unit (ALU) capable of operating on

binary data

• A control unit, which interprets the instructions in memory

and causes them to be executed

• Input and output (I/O) equipment operated by the control unit

IAS - details
• 1000 x 40 bit words
—Binary number
—2 x 20 bit instructions
—Both data and instructions are stored
• Set of registers (storage in CPU)
—Memory Buffer Register
—Memory Address Register
—Instruction Register
—Instruction Buffer Register
—Program Counter
—Accumulator
—Multiplier Quotient
Registers
• Memory buffer register (MBR):
Contains a word to be stored in memory
or
• sent to the I/O unit, or is used to receive
a word from memory or from the
• I/O unit.
• • Memory address register (MAR):
Specifies the address in memory of the
• word to be written from or read into the
MBR.
• • Instruction register (IR): Contains
the 8-bit opcode instruction being
Registers
• Instruction buffer register (IBR):
Employed to hold temporarily the
righthand instruction from a word in
memory.
• Program counter (PC): Contains the
address of the next instruction-pair to be
fetched from memory.
Registers
• Accumulator (AC) and multiplier
quotient (MQ): Employed to hold
temporarily operands and results of ALU
operations.
• For example, the result of multiplying two
40-bit numbers is an 80-bit number; the
most significant 40 bits are stored in the
AC and the least significant in the MQ.
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instruction cycle
• The control unit operates the IAS by
fetching instructions from memory and
executing them one at a time.
• The IAS operates by repetitively
performing an instruction cycle
• Each instruction cycle consists of two
subcycles.
fetch cycle
• During the fetch cycle, the opcode of the
next instruction is loaded into the IR and
the address portion is loaded into the
MAR.This instruction may be taken from
the IBR, or it can be obtained from
memory by loading a word into the MBR,
and then down to the IBR, IR, and MAR.
execute cycle
• Once the opcode is in the IR, the execute
cycle is performed.
• Control circuitry interprets the opcode and
executes the instruction by sending out
the appropriate control signals to cause
data to be moved or an operation to be
performed by the ALU.
• The IAS computer had a total of 21
instructions
IAS Instructions
• Data transfer: Move data between
memory and ALU registers or between
two ALU registers.
• Unconditional branch: Normally, the
control unit executes instructions in
sequence from memory. This sequence
can be changed by a branch instruction,
which facilitates repetitive operations.
IAS Instructions
• Conditional branch: The branch can be
made dependent on a condition, thus
allowing decision points.
• Arithmetic: Operations performed by the
ALU.
• Address modify: Permits addresses to
be computed in the ALU and then inserted
into instructions stored in memory. This
allows a program considerable addressing
flexibility.
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IAS
Instructions
The HW/SW Interface

Application software a[i] = b[i] + c;

Compiler

lw $15, 0($2)
add $16, $15, $14
Systems software add $17, $15, $13
(OS, compiler) lw $18, 0($12)
lw $19, 0($17)
add $20, $18, $19
sw $20, 0($16)
Assembler

Hardware 000000101100000
110100000100010
…
IAS
Instructions
• Table presents instructions in a symbolic,
easy-to-read form.
• Actually, each instruction must conform to
the format of Figure (Next Slide). The
opcode portion (first 8 bits) specifies
which of the 21 instructions is to be
executed.
• The address portion (remaining 12 bits)
specifies which of the 1000 memory
locations is to be involved in the execution
of the instruction.
Structure of IAS –
detail
Commercial Computers
• 1947 - Eckert-Mauchly Computer
Corporation
• UNIVAC I (Universal Automatic Computer)
• Commissioned by US Bureau of Census
1950 calculations
• Vacuum tube based
• Became part of Sperry-Rand Corporation
• Late 1950s - UNIVAC II
—Faster
—More memory
IBM
• Manufacturer of Punched-card processing
equipment
• 1953 - the 701
—IBM’s first stored program computer
—Scientific calculations
• 1955 - the 702
—Business applications
• Lead to 700/7000 series
Transistors
• Replaced vacuum tubes
• Smaller
• Cheaper
• Less heat dissipation
• Solid State device
• Made from Silicon (Sand)
• Invented 1947 at Bell Labs
• William Shockley et al.
Transistor Based Computers
• Second generation machines
• NCR & RCA produced small transistor
machines
• IBM 7000
• Digital Equipment Corporation (DEC) -
1957
—Produced PDP-1
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Microelectronics
• Literally - “small electronics”
• A computer is made up of gates, memory
cells and interconnections
• These can be manufactured on a
semiconductor
• e.g. silicon wafer
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 Fundamental types of components

Data movement: The paths among components are used to move

data from
memory to memory and from memory through gates to memory.

Control: The paths among components can carry control signals.

The integrated circuit
 The integrated circuit exploits the fact that such
components as transistors, resistors, and conductors
can be fabricated from a semiconductor such as
silicon.

 It is merely an extension of the solid-state art to

fabricate an entire circuit in a tiny piece of silicon
rather than assemble discrete components made
from separate pieces of silicon into the same circuit.

 Many transistors can be produced at the same time

on a single wafer of silicon.

 Equally important, these transistors can be

connected with a process of metallization to form
circuits.

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Generations of Computer
• Vacuum tube - 1946-1957
• Transistor - 1958-1964
• Small scale integration - 1965 on
—Up to 100 devices on a chip
• Medium scale integration - to 1971
—100-3,000 devices on a chip
• Large scale integration - 1971-1977
—3,000 - 100,000 devices on a chip
• Very large scale integration - 1978 -1991
—100,000 - 100,000,000 devices on a chip
• Ultra large scale integration – 1991 -
—Over 100,000,000 devices on a chip
Moore’s Law
• Increased density of components on chip
• Gordon Moore – co-founder of Intel
• Number of transistors on a chip will double every
year
• Since 1970’s development has slowed a little
— Number of transistors doubles every 18 months
• Cost of a chip has remained almost unchanged
• Higher packing density means shorter electrical
paths, giving higher performance
• Smaller size gives increased flexibility
• Reduced power and cooling requirements
• Fewer interconnections increases reliability
Growth in CPU Transistor Count
IBM 360 series
• 1964
• Replaced (& not compatible with) 7000
series
• First planned “family” of computers
—Similar or identical instruction sets
—Similar or identical O/S
—Increasing speed
—Increasing number of I/O ports (i.e. more
terminals)
—Increased memory size
—Increased cost
• Multiplexed switch structure
DEC PDP-8
• 1964
• First minicomputer (after miniskirt!)
• Did not need air conditioned room
• Small enough to sit on a lab bench
• $16,000
—$100k+ for IBM 360
• Embedded applications & OEM
• BUS STRUCTURE
DEC - PDP-8 Bus Structure
Semiconductor Memory
• 1970
• Fairchild
• Size of a single core
—i.e. 1 bit of magnetic core storage
• Holds 256 bits
• Non-destructive read
• Much faster than core
• Capacity approximately doubles each year
Intel
• 1971 - 4004
—First microprocessor
—All CPU components on a single chip
—4 bit
• Followed in 1972 by 8008
—8 bit
—Both designed for specific applications
• 1974 - 8080
—Intel’s first general purpose microprocessor
x86 Evolution (1)
• 8080
— first general purpose microprocessor
— 8 bit data path
— Used in first personal computer – Altair
• 8086 – 5MHz – 29,000 transistors
— much more powerful
— 16 bit
— instruction cache, prefetch few instructions
— 8088 (8 bit external bus) used in first IBM PC
• 80286
— 16 Mbyte memory addressable
— up from 1Mb
• 80386
— 32 bit
— Support for multitasking
• 80486
— sophisticated powerful cache and instruction pipelining
— built in maths co-processor
x86 Evolution (2)
• Pentium
— Superscalar
— Multiple instructions executed in parallel
• Pentium Pro
— Increased superscalar organization
— Aggressive register renaming
— branch prediction
— data flow analysis
— speculative execution
• Pentium II
— MMX technology
— graphics, video & audio processing
• Pentium III
— Additional floating point instructions for 3D graphics
x86 Evolution (3)
• Pentium 4
— Note Arabic rather than Roman numerals
— Further floating point and multimedia enhancements
• Core
— First x86 with dual core
• Core 2
— 64 bit architecture
• Core 2 Quad – 3GHz – 820 million transistors
— Four processors on chip

• x86 architecture dominant outside embedded systems

• Organization and technology changed dramatically
• Instruction set architecture evolved with backwards compatibility
• ~1 instruction per month added
• 500 instructions available
• See Intel web pages for detailed information on processors
Internet Resources
• http://www.intel.com/
—Search for the Intel Museum
• http://www.ibm.com
• http://www.dec.com
• Charles Babbage Institute
• PowerPC
• Intel Developer Home
References
• AMDA67 Amdahl, G. “Validity of the
Single-Processor Approach to Achieving
Large-Scale Computing Capability”,
Proceedings of the AFIPS Conference,
1967.