Ldo

LDO(Low Drop-Out)
Regulator
What is a LDO?
A Low-Dropout Regulator is a DC linear

voltage regulator which can operate with
a very small input – output differential
voltage.
“Dropout voltage is the difference in

input-to-output voltage ”
Vdrop = Vin - Vout
Basic LDO Circuit using P-MOSFET
Pass Element
Essential blocks of LDO
The regulator circuit can be partitioned into the following

functional blocks
 Pass Element
 Reference Voltage(Vref)
 Sampling resistor (series connected resistors which act
as voltage divider)
 An Error Amplifier
 Input Capacitor Cin & Output Capacitor Cout
Pass Element
The input voltage is applied to a pass element,there is a voltage drop
before reaching the output. The resulting output voltage is sensed by
the error amplifier and compared to a reference voltage. The bipolar
devices can deliver the highest output currents for a given supply
voltage. The MOS-based circuits offer limited drive performance with
a strong dependence on aspect ratio (width to length ratio) and to
voltage-gate drive. On the positive side, however, the voltage-driven
MOS devices minimize quiescent current flow.
Pass Elements can be N-channel or P-channel FET, but can also be
NPN,PNP Transistor or Darlington NPN or PNP
PMOS is used when Vin is>=2V
NMOS is used when Vin is <=1V
Pass Elements used in LDO
Gate Drive
The purpose of the Gate Drive architecture

is to speed up switching by providing the
highest current during the transition
region when the gate drain capacitance
of the MOSFET is being charged or
discharged as part of the turn on/turn off
process.
Error Amplifier
Error Amplifier controls the gate of the pass element.

One input of the differential amplifier monitors the
fraction of the output determined by the resistor ratio
of R1 and R2. The second input to the differential
amplifier is from a stable voltage reference (band-gap
reference). If the output voltage rises too high relative
to the reference voltage, the drive to the power FET
changes to maintain a constant output voltage.
Vout = Vref (1+R1/R2)
Input Capacitor CIN
Although not always required,an input capacitor is

recommended. Good bypassing on the input
assures that the regulator is working from a
source with a low impedance,which improves
stability. A good input capacitor can also
improve transient response by providing a
reservoir of stored energy that the regulator can
utilize in cases where the load current demand
suddenly increases.
Output Capacitor COUT
The output capacitor is required for loop stability

(compensation)as well as transient response.
During sudden changes in load current demand,
the output capacitor must source or sink current
during the time it takes the control loop(which
drives the Gate of the FET) to adjust the gate drive
to the pass FET. As a general rule, a larger output
capacitor will improve both transient response and
phase margin(stability).
LDO using N-MOSFET
LDO using Vbias/Charge pump as external

supply as per circuit requirement
Regulation
Low-dropout (LDO) regulators use open collector
or open drain topology. In this topology, the
transistor may be easily driven into saturation
with the voltages available to the regulator. This
allows the voltage drop from the unregulated
voltage to the regulated voltage to be as low as
the saturation voltage across the transistor.
Regulation will happen only when : Vin > Vout +
V-drop
Efficiency and Heat Dissipation
The power dissipated in the pass element and internal circuitry (P LOSS) of a typical LDO is calculated as follows:
 P LOSS = ( V IN − V OUT ) I OUT + V IN X IQ
where IQ is the quiescent current required by the LDO for its internal circuitry.
Therefore, one can calculate the efficiency as follows:
 η = P IN − P LOSS /P IN where P IN = V IN X I OUT
However, when the LDO is in full operation (i.e. supplying current to the load) generally:
I OUT ≫ I Q . This allows us to reduce P LOSS to the following:
 P LOSS = ( V IN − V OUT ) I OUT
which further reduces the efficiency equation to:

 η = V OUT /V IN
It is important to keep thermal considerations in mind when using a low drop-out linear regulator. Having high
current and/or a wide differential between input and output voltage could lead to large power dissipation.
Additionally, efficiency will suffer as the differential widens. Depending on the package, excessive power
dissipation could damage the LDO or cause it to go into thermal shutdown.
LDO Features
LDO’s regulate the output voltage by controlling

the conduction of the pass element in a linear
regulation. This linear regulation provides
accurate, noise free output voltage which can
quickly respond to load changes on the output.
The key advantage of an LDO is its simplicity
and low cost design with low noise and fast
voltage conversion.
LDO regulators are typically used when:
Converting a higher input voltage (VIN) into a lower
output voltage (VOUT)
A very clean power supply is required or when the
application is noise sensitive
VIN/VOUT ratio is not very high, i.e. 3.3V to 2.5V
Application draws moderate current
The LDO power dissipation is limited, i.e. less than
0.8W
Advantages vs Disadvantages
By
Avinash Chandrakanth Simpi
Reference:
Texas Instruments pdf on LDO
& Richtek pdf and video on LDO

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LDO(Low Drop-Out)

A Low-Dropout Regulator is a DC linear

“Dropout voltage is the difference in

The regulator circuit can be partitioned into the following

The purpose of the Gate Drive architecture

Error Amplifier controls the gate of the pass element.

Although not always required,an input capacitor is

The output capacitor is required for loop stability

LDO using Vbias/Charge pump as external

 P LOSS = ( V IN − V OUT ) I OUT + V IN X IQ

 η = P IN − P LOSS /P IN where P IN = V IN X I OUT

 P LOSS = ( V IN − V OUT ) I OUT

which further reduces the efficiency equation to:

LDO’s regulate the output voltage by controlling

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