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Architectures of Computers

The document summarizes the major components and flow of information in a basic computer architecture. It discusses: 1) The three major units of a computer - memory for storing instructions and data, a processor containing a control unit and ALU, and I/O units for communication. 2) Information flows between memory and the processor through a single data bus, with the processor fetching instructions from memory and executing them on the ALU. 3) The von Neumann architecture model stores both instructions and data together in main memory, which can create a performance bottleneck as all information must pass through a single channel.

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Muhammad Arshad
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19 views

Architectures of Computers

The document summarizes the major components and flow of information in a basic computer architecture. It discusses: 1) The three major units of a computer - memory for storing instructions and data, a processor containing a control unit and ALU, and I/O units for communication. 2) Information flows between memory and the processor through a single data bus, with the processor fetching instructions from memory and executing them on the ALU. 3) The von Neumann architecture model stores both instructions and data together in main memory, which can create a performance bottleneck as all information must pass through a single channel.

Uploaded by

Muhammad Arshad
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
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Architectures of Computers

There are 3 major units in a computer tied together by buses:


1) Memory The unit that stores and retrieves instructions and
data.
2) Processor: The unit that houses two separate
components:
The control unit: Repeats the following 3 tasks repeatedly
Fetches an instruction from memory
Decodes the instruction
Executes the instruction
The arithmetic/logic unit (ALU): Performs
mathematical and logical operations.

3) Input/Output (I/O) Units: Handles communication with the


outside world.
Pictorial View of Computer
Organization
Processor

Memory Input / Output


Control
Unit

ALU
Flow of Information
• There is only one data bus.

Processor

Figure Data flow through a von Neumann architecture


Ven Neumann Architecture
• There is only one main memory and one bus
• Both data and instructions are stored together, this process is called
as stored program concept.
• When information is fetched from the main memory location address
through a register called program counter, the information is machine
instructions.
• When information is fetched with the address specified by any other
register, the information is data.
• Van Neumann model is universal in general purpose computing, it
suffers from one clear problem
• All information (instructions and data) must flow back and forth
between the processor and memory through a single channel.
• But the channel has finite bandwidth, when the bandwidth is fully
used, the processor can go no faster.
• This performance limiting factor is called von Neumann bottleneck.
• In addition the processor can only fetch only data or instruction at
one time.
• The speed of execution is slow.
• CPU operation is simple, as it has to fetch data/instructions one by
one.
• Where as in Harvard architecture we will see that CPU has to
manage/coordinate both the fetching of data/instruction at the same
time.
• Space adjustment possible for data/instructions if available.
• Almost all computer designs are based on Van Neumann architecture.
• With the addition of cache memories.
• Instruction cache and Data cache.
Harvard Architecture
• Has two memories.
• One for the instructions and one for the data.
• Each separately connected with the CPU.
• Single clock cycle is sufficient for data/instruction fetching.

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